h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 197

• Manufacturer Part Number: h8s-2635
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Note: The H8S/2635 Group is not equipped with a PBC.
6.1
The PC break controller (PBC) provides functions that simplify program debugging. Using these
functions, it is easy to create a self-monitoring debugger, enabling programs to be debugged with
the chip alone, without using an in-circuit emulator. Four break conditions can be set in the PBC:
instruction fetch, data read, data write, and data read/write.
6.1.1
The PC break controller has the following features:
Two break channels (A and B)
The following can be set as break compare conditions:
The timing of PC break exception handling after the occurrence of a break condition is as
follows:
Module stop mode can be set
24 address bits
Bit masking possible
Bus cycle
Instruction fetch
Data access: data read, data write, data read/write
Bus master
Either CPU or CPU/DTC can be selected
Immediately before execution of the instruction fetched at the set address (instruction
fetch)
Immediately after execution of the instruction that accesses data at the set address (data
access)
The initial setting is for PBC operation to be halted. Register access is enabled by clearing
module stop mode.
Overview
Features
Section 6 PC Break Controller (PBC)
Rev. 6.00 Feb 22, 2005 page 137 of 1484
Section 6 PC Break Controller (PBC)
REJ09B0103-0600