h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 475

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h8s-2635

Manufacturer Part Number
h8s-2635
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
12.1
The chip has two channel inbuilt watchdog timers (WDT0/WDT1). The WDT can also generate
an internal reset signal for the chip if a system crash prevents the CPU from writing to the timer
counter, allowing it to overflow.
When this watchdog function is not needed, the WDT can be used as an interval timer. In interval
timer operation, an interval timer interrupt is generated each time the counter overflows.
12.1.1
WDT features are listed below.
Notes: 1. Other than the U-mask and W-mask versions, and H8S/2635 Group have eight types of
Switchable between watchdog timer mode and interval timer mode
An internal reset can be issued if the timer counter overflows
Interrupt generation when in interval timer mode
WDT0 and WDT1 respectively allow eight and sixteen types *
selected
In the watchdog timer mode, the WDT can generate an internal reset
If the counter overflows, the WDT generates an interval timer interrupt
The maximum interval of the WDT is given as a system clock cycle
A subclock *
Where a subclock is selected, the maximum interval is given as a subclock cycle
256
2. Subclock functions (subactive mode, subsleep mode, and watch mode) are available in
Overview
Features
counter input clock as well as WDT0.
the U-mask and W-mask versions, and H8S/2635 Group only.
See section 22A.7, Subclock Oscillator, for the method of fixing pins when OSC1 and
OSC2 are not used. The H8S/2639 and H8S/2635 Groups have no OSC1 and OSC2
pins.
2
may be selected for the input counter of WDT1
Section 12 Watchdog Timer
Rev. 6.00 Feb 22, 2005 page 415 of 1484
1
of counter input clock to be
Section 12 Watchdog Timer
131072 256
REJ09B0103-0600
256

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