h8s-2635 Renesas Electronics Corporation., h8s-2635 Datasheet - Page 202

• Manufacturer Part Number: h8s-2635
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2600 Series
• Manufacturer: Renesas Electronics Corporation.

Section 6 PC Break Controller (PBC)
Bits 2 and 1—Break Condition Select A (CSELA1, CSELA0): These bits selection an
instruction fetch, data read, data write, or data read/write cycle as the channel A break condition.
Bit 0—Break Interrupt Enable A (BIEA): Enables or disables channel A PC break interrupts.
6.2.4
BCRB is the channel B break control register. The bit configuration is the same as for BCRA.
6.2.5
MSTPCRC is an 8-bit readable/writable register that performs module stop mode control.
When the MSTPC4 bit is set to 1, PC break controller operation is stopped at the end of the bus
cycle, and module stop mode is entered. Register read/write accesses are not possible in module
stop mode. For details, see section 23A.5, 23B.5, Module Stop Mode.
MSTPCRC is initialized to H'FF by a reset and in hardware standby mode. It is not initialized in
software standby mode.
Rev. 6.00 Feb 22, 2005 page 142 of 1484
REJ09B0103-0600
Bit 2
CSELA1
0
1
Bit 0
BIEA
0
1
Break Control Register B (BCRB)
Module Stop Control Register C (MSTPCRC)
Bit 1
CSELA0
0
1
0
1
Description
PC break interrupts are disabled
PC break interrupts are enabled
Description
Instruction fetch is used as break condition
Data read cycle is used as break condition
Data write cycle is used as break condition
Data read/write cycle is used as break condition
(Initial value)
(Initial value)