peb2256 Infineon Technologies Corporation, peb2256 Datasheet - Page 80

• Manufacturer Part Number: peb2256
• Description: E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
• Manufacturer: Infineon Technologies Corporation

4.2.2
The framing structure is defined by the contents of time slot 0 (refer to
Table 16
Bit
AlternateNumber
Frames
Frame Containing the
Frame Alignment Signal
Frame not Containing the
Frame Alignment Signal
or
Service Word
1)
2)
3)
4)
4.2.2.1
In transmit direction, contents of time slot 0 frame alignment signal of the outgoing PCM
frame are normally generated by the FALC56. However, transparency for the complete
time slot 0 can be achieved by selecting the transparent mode XSP.TT0. With the
Transparent Service Word Mask register TSWM the S
selectively switched through transparently.
Data Sheet
S
information trough bits RSW.RSI and RSP.RSIF. Transmission is enabled by bits XSW.XSIS and XSP.XSIF.
Fixed to "1". Used for synchronization.
Remote alarm indication: In undisturbed operation "0"; in alarm condition "1".
S
trough bits RSW.RY0…4. Transmission is enabled by bits XSW.XY0…4. HDLC signaling in bits S
selectable. As a special extension for double frame format, the S
used optionally.
i
a
-bits: reserved for international use. If not used, these bits should be fixed to "1". Access to received
-bits: Reserved for national use. If not used, they should be fixed at "1". Access to received information
Doubleframe Format (E1)
Transmit Transparent Modes
Allocation of Bits 1 to 8 of Time Slot 0 (E1)
1
S
Note
S
Note
i
i
1)
1)
2
0
Frame Alignment Signal
1
Note
2)
3
0
A
Note
80
3)
4
1
S
Note
a4
a
i
4)
-bit registers RSA4 to 8/XSA4 to 8 can be
-bits, A-bit and the S
5
1
S
Functional Description E1
a5
6
0
S
a6
Table
FALC56 V1.2
7
1
S
a7
a
-bits can be
PEB 2256
2002-08-27
16).
a
S
4 to 8 is
8
1
a8