peb2256 Infineon Technologies Corporation, peb2256 Datasheet - Page 439

• Manufacturer Part Number: peb2256
• Description: E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
• Manufacturer: Infineon Technologies Corporation

Receive Byte Count Register 2 (Read)
Value after reset: 00
RBC2
OV2
RBC2(6:0)
Receive Byte Count Register 3 (Read)
Value after reset: 00
RBC3
OV3
RBC3(6:0)
Signaling Status Register 2 (Read)
Value after reset: 00
SIS2
XDOV2
Data Sheet
XDOV2
OV2
OV3
7
7
7
RBC26
Counter Overflow - HDLC Channel 2
0 =
1 =
Receive Byte Count - HDLC Channel 2
Indicates the length of a received frame.
RBC36
Counter Overflow - HDLC Channel 3
0 =
1 =
Receive Byte Count - HDLC Channel 3
Indicates the length of a received frame.
Transmit Data Overflow - HDLC Channel 2
More than 32 bytes have been written to the XFIFO2.
This bit is reset
– by a transmitter reset command XRES or
– when all bytes in the accessible half of the XFIFO2 have been
XFW2
H
H
H
moved in the inaccessible half.
Less than or equal to 128 bytes received
More than 128 bytes received
Less than or equal to 128 bytes received
More than 128 bytes received
RBC25
RBC35
XREP2
RBC24
RBC34
439
RBC23
RBC33
RLI2
RBC22
RBC32
CEC2
RBC21
RBC31
T1/J1 Registers
RBC20
RBC30
FALC56 V1.2
0
0
0
PEB 2256
2002-08-27
(90)
(91)
(98)