peb2256 Infineon Technologies Corporation, peb2256 Datasheet - Page 57

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peb2256

Manufacturer Part Number
peb2256
Description
E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
Manufacturer
Infineon Technologies Corporation
Datasheet

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3.3.2
In the FALC56 a Test Access Port (TAP) controller is implemented. The essential part
of the TAP is a finite state machine (16 states) controlling the different operational modes
of the boundary scan. Both, TAP controller and boundary scan, meet the requirements
given by the JTAG standard IEEE 1149.1.
Figure 11
After switching on the device (power-on), a reset signal has to be applied to TRS, which
forces the TAP controller into test logic reset state.
For normal operation without boundary scan access, the boundary reset pin TRS can be
tied to the device reset pin RES.
The boundary length is 129.
Data Sheet
TDO
TMS
TRS
TCK
TDI
Boundary Scan Interface
Block Diagram of Test Access Port and Boundary Scan
TAP controller reset
clock
test
control
data in
enable
data
out
Generation
test signal generator
finite state machine
instruction register
Clock
TAP Controller
57
Figure 11
Reset
Functional Description E1/T1/J1
gives an overview.
ID data out
control
bus
BD data out
BD data in
FALC56 V1.2
F0115
PEB 2256
2002-08-27
1
2
n

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