peb2256 Infineon Technologies Corporation, peb2256 Datasheet - Page 415

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peb2256

Manufacturer Part Number
peb2256
Description
E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
Manufacturer
Infineon Technologies Corporation
Datasheet

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Framer Receive Status Register 2 (Read)
FRS2
ESC(2:0)
Table 68
Tested Alarms ESC(2:0) =
LFA
LMFA
RRA (bit2 = 0)
RRA (S-bit frame 12)
RRA (DL-pattern)
LOS
EBC
EBC
AIS
FEC
CVC
CEC (only ESF)
RSP
RSN
XSP
XSN
BEC
COEC
1)
2)
Data Sheet
only active during FMR0.SIM = 1
FEC is counting +2 while EBC is counting +1 if the framer is in synchronous state; if asynchronous in state 2
but synchronous in state 6, counters are incremented during state 6
1)
1)
2)
2)
2)
1)
(F12,F72)
(only ESF)
ESC2
7
Alarm Simulation States
Error Simulation Counter
This three-bit counter is incremented by setting bit FMR0.SIM. The
state of the counter determines the function to be tested.
For complete checking of the alarm indications, eight simulation steps
are necessary (FRS2.ESC = 0 after a complete simulation).
ESC1
ESC0
0
415
1
×
×
×
×
×
×
×
×
×
2
×
×
×
×
×
×
×
×
×
×
×
×
3
4
T1/J1 Registers
5
×
×
×
×
×
×
×
×
FALC56 V1.2
0
PEB 2256
(×)
(×)
(×)
2002-08-27
6
×
×
×
×
×
×
(4E)
7

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