peb2256 Infineon Technologies Corporation, peb2256 Datasheet - Page 111

• Manufacturer Part Number: peb2256
• Description: E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
• Manufacturer: Infineon Technologies Corporation

4.5.2.1
The pulse length of SYPX is always the basic E1 bit width (488 ns), independent of the
selected system highway clock and data frequency.
SYPX Offset Calculation
T:
SD:
SC:
X:
0 ≤ T ≤ 4:
5 ≤ T ≤ T
Data Sheet
Time between beginning of SYPX pulse and beginning of next frame
(time slot 0, bit 0), measured in number of SCLKX clock intervals
maximum delay: T
Basic data rate; 2.048 Mbit/s
System clock rate; 2.048, 4.096, 8.192, or 16.384 MHz
Programming value to be written to registers XC0 and XC1 (see
max
Transmit Offset Programming
: X = 256 × SC/SD - T + 4
X = 4 - T
max
= (256 × SC/SD) - 1
111
Functional Description E1
FALC56 V1.2
page
PEB 2256
2002-08-27
237).