peb2256 Infineon Technologies Corporation, peb2256 Datasheet - Page 47

• Manufacturer Part Number: peb2256
• Description: E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
• Manufacturer: Infineon Technologies Corporation

Table 4
Pin
No.
60
61
62
63
Data Sheet
Ball
No.
B8
A9
A8
B7
Pin Definitions - System Interface (cont’d)
Symbol
XPA
XPB
XPC
XPD
Output (O)
Supply (S)
O
O
I + PU
Input (I)
Function
Data Link Bit Transmit (DLX)
PC(1:4).XPC(3:0) = 0110
E1: Marks the S
stream on XDI. The S
slot 0 of every frame not containing the frame
alignment signal are selected by register
XC0.SA8E to XC0.SA4E.
T1/J1: This output provides a 4-kHz signal
which marks the DL-bit position within the data
stream on XDI (in ESF mode only).
Transmit Clock (XCLK)
PC(1:4).XPC(3:0) = 0111
Transmit line clock of 2.048 MHz (E1) or
1.544 MHz (T1/J1) derived from SCLKX/R,
RCLK or generated internally by DCO
circuitries.
Transmit Line Tristate (XLT)
PC(1:4).XPC(3:0) = 1000
A high level on this port sets the transmit lines
XL1/2 or XDOP/N into tristate mode. This pin
function is logically ored with register bit
XPM2.XLT.
47
a
(8:4)-bits within the data
a
(8:4)-bit positions in time
Pin Descriptions
FALC56 V1.2
PEB 2256
2002-08-27