peb2256 Infineon Technologies Corporation, peb2256 Datasheet - Page 307

• Manufacturer Part Number: peb2256
• Description: E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
• Manufacturer: Infineon Technologies Corporation

Signaling Status Register (Read)
SIS
XDOV
XFW
XREP
RLI
CEC
SFS
Data Sheet
XDOV
7
Transmit Data Overflow - HDLC Channel 1
More than 32 bytes have been written to the XFIFO.
This bit is reset
– by a transmitter reset command XRES
– when all bytes in the accessible half of the XFIFO have been moved
Transmit FIFO Write Enable - HDLC Channel 1
Data can be written to the XFIFO.
Transmission Repeat - HDLC Channel 1
Status indication of CMDR.XREP.
Receive Line Inactive - HDLC Channel 1
Neither flags as interframe time fill nor frames are received through
the signaling time slot.
Command Executing - HDLC Channel 1
0 =
1 =
Note: CEC is active for about 2.5 periods of the current system data
Status Freeze Signaling
0 =
1 =
XFW
in the inaccessible half.
rate.
Freeze signaling status inactive.
Freeze signaling status active
No command is currently executed, the CMDR register can be
written to.
A command (written previously to CMDR) is currently executed,
no further command can be temporarily written in CMDR
register.
XREP
307
RLI
CEC
SFS
FALC56 V1.2
E1 Registers
0
PEB 2256
2002-08-27
(64)