peb2256 Infineon Technologies Corporation, peb2256 Datasheet - Page 328

• Manufacturer Part Number: peb2256
• Description: E1/t1/j1 Framer And Line Interface Component For Long And Short Haul Applications
• Manufacturer: Infineon Technologies Corporation

RDO3
CRC163
RAB3
HA13, HA03
LA3
Data Sheet
Note: Shorter frames are not reported.
Receive Data Overflow - HDLC Channel 3
A data overflow has occurred during reception of the frame.
Additionally, an interrupt can be generated
(refer to ISR5.RDO3/IMR5.RDO3).
CRC16 Compare/Check - HDLC Channel 3
0 =
1 =
Receive Message Aborted - HDLC Channel 3
This bit is set, if more than 5 contiguous 1-bits are detected.
High Byte Address Compare - HDLC Channel 3
Significant only if 2-byte address mode is selected.
In operating modes which provide high byte address recognition, the
FALC
of two individually programmable registers (RAH1, RAH2) and the
fixed values FE
Depending on the result of this comparison, the following bit
combinations are possible:
00 = RAH2 has been recognized
01 = Broadcast address has been recognized
10 = RAH1 has been recognized C/R=0 (bit 1)
11 = RAH1 has been recognized C/R=1 (bit 1)
Note: If RAH1, RAH2 contain identical values, a match is indicated by
Low Byte Address Compare - HDLC Channel 3
Significant in HDLC modes only.
The low byte address of a 2-byte address field, or the single address
byte of a 1-byte address field is compared with two registers. (RAL1,
RAL2).
0 =
1 =
CRC check failed; received frame contains errors.
CRC check o.k.; received frame is error-free.
"10" or "11".
RAL2 has been recognized
RAL1 has been recognized
®
compares the high byte of a 2-byte address with the contents
H
and FC
328
H
(broadcast address).
FALC56 V1.2
E1 Registers
PEB 2256
2002-08-27