mt46h32m16lf Micron Semiconductor Products, mt46h32m16lf Datasheet - Page 67

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mt46h32m16lf

Manufacturer Part Number
mt46h32m16lf
Description
512mb X16, X32 Mobile Ddr Sdram
Manufacturer
Micron Semiconductor Products
Datasheet

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Figure 31:
PDF: 09005aef82ce3074/Source: 09005aef82ce20c9
ddr_mobile_sdram_cmd_op_timing_dia_fr3.08__3.fm - Rev. D 05/08 EN
Command
Address
t
t
t
DQSS (NOM)
DQSS (MIN)
DQSS (MAX)
DQS
DQS
DQS
WRITE-to-READ – Odd Number of Data, Interrupting
CK#
DM
DM
DM
DQ
DQ
DQ
CK
Notes:
Bank a,
WRITE
Col b
T0
t
t
t
DQSS
DQSS
DQSS
1. D
2. An interrupted burst of 4 is shown; one data element is written, three are masked.
3.
4. A10 is LOW with the WRITE command (auto precharge is disabled).
5. DQS is required at T2 and T2n (nominal case) to register DM.
t
WTR is referenced from the first positive CK edge after the last data-in pair.
IN
D
b
b = data-in for column b; D
IN
NOP
D
T1
b
IN
D
b
IN
T1n
NOP
T2
t
WTR
T2n
67
Bank a,
READ
OUT
Col b
T3
n = data-out for column n.
Micron Technology, Inc., reserves the right to change products or specifications without notice.
T4
NOP
CL = 3
CL = 3
CL = 3
Don’t Care
T5
NOP
T5n
Mobile DDR SDRAM
©2007 Micron Technology, Inc. All rights reserved
Transitioning Data
D
D
D
OUT
n
OUT
n
OUT
n
T6
NOP
D
n + 1
D
n + 1
D
n + 1
OUT
OUT
OUT
T6n
Operations

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