mt46h32m16lf Micron Semiconductor Products, mt46h32m16lf Datasheet - Page 15

• Manufacturer Part Number: mt46h32m16lf
• Description: 512mb X16, X32 Mobile Ddr Sdram
• Manufacturer: Micron Semiconductor Products

Table 3:
PDF: 09005aef82d5d305/Source: 09005aef82d5d2e7
512mb_ddr_mobile_sdram_t47m_density__2.fm - Rev. D 05/08 EN
Parameter/Condition
Output leakage current
(DQs are disabled; 0V ≤ V
Operating temperature
Commercial
Industrial
AC/DC Electrical Characteristics and Operating Conditions (continued)
Notes: 1–5 apply to all parameters/conditions in this table; V
Notes:
OUT
10. CK and CK# input slew rate must be ≥1 V/ns (2 V/ns if measured differentially).
11. V
12. The value of V
13. DQ and DM input slew rates must not deviate from DQS by more than 10 percent. 50ps
1. All voltages referenced to V
2. All parameters assume proper device initialization.
3. Tests for AC timing, I
4. Outputs measured with equivalent load; transmission line delay is assumed to be very small:
5. Timing and I
6. Any positive glitch must be less than 1/3 of the clock cycle and not more than +200mV or
7. V
8. To maintain a valid level, the transitioning edge of the input must:
9. V
8b. Reach at least the target AC level.
8a. Sustain a constant slew rate from the current AC level through to the target AC level,
8c. After the AC target level is reached, continue to maintain at least the target DC level,
≤ V
nal supply voltage levels, but the related specifications and device operation are guaran-
teed for the full voltage range specified.
input timing is still referenced to V
timing reference voltage level is V
2.0V, whichever is less. Any negative glitch must be less than 1/3 of the clock cycle and not
exceed either –150mV or +1.6V, whichever is more positive.
be greater than 1/3 of the cycle rate. V
≤3ns and the pulse width cannot be greater than 1/3 of the cycle rate.
CK#.
ations in the DC level of the same.
must be added to
exceeds 4 V/ns, functionality is uncertain.
I/O
DD
IH
ID
DD
V
V
is the magnitude of the difference between the input level on CK and the input level on
overshoot: V
Full-drive strength
and V
IL
IL
Q)
(
(
AC
DC
) or V
) or V
DD
50
DD
Q must track each other and V
IX
IH
IH
tests may use a V
(
(
IH
is expected to equal V
AC
DC
t
(MAX) = V
DS and
).
).
Symbol
DD
20pF
I
, and electrical AC and DC characteristics may be conducted at nomi-
T
T
OZ
A
A
t
DH for each 100 mV/ns reduction in slew rate. If slew rate
SS
15
DD
.
I/O
Q + 1.0V for a pulse width ≤3ns and the pulse width cannot
IL
Half-drive strength
-to-V
DD
DD
Q/2.
Q/2 (or to the crossing point for CK/CK#). The output
Min
DD
IL
Micron Technology, Inc., reserves the right to change products or specifications without notice.
–40
IH
–5
512Mb: x16, x32 Mobile DDR SDRAM
50
0
undershoot: V
Q/2 of the transmitting device and must track vari-
swing of up to 1.5V in the test environment, but
DD
DD
/V
Q must be less than or equal to V
DD
Q = 1.70–1.95V
10pF
IL
Max
+70
+85
(MIN) = –1.0V for a pulse width
5
Electrical Specifications
©2004 Micron Technology, Inc. All rights reserved
Unit
µA
°C
°C
DD
.
Notes