mt46h32m16lf Micron Semiconductor Products, mt46h32m16lf Datasheet - Page 5

• Manufacturer Part Number: mt46h32m16lf
• Description: 512mb X16, X32 Mobile Ddr Sdram
• Manufacturer: Micron Semiconductor Products

Figure 1:
FBGA Part Marking Decoder
General Description
PDF: 09005aef82d5d305/Source: 09005aef82d5d2e7
512mb_ddr_mobile_sdram_t47m_density__2.fm - Rev. D 05/08 EN
Micron Technology
Product Family
46 = Mobile DDR SDRAM
Operating Voltage
H = 1.8V/1.8V
Configuration
32 Meg x 16
16 Meg x 32
Addressing
LF = Mobile standard addressing
LG = Reduced page-size option
Package Codes
BF = 8mm x 9mm VFBGA “green”
CM = 10mm x 13mm VFBGA “green”
512Mb Mobile DDR Part Numbering
Notes:
1. Throughout the data sheet, the various figures and text refer to DQs as “DQ.” The DQ
2. Complete functionality is described throughout the document and any page or dia-
3. Any specific requirement takes precedence over a general statement.
Due to space limitations, FBGA-packaged components have an abbreviated part
marking that is different from the part number. Micron’s FBGA part marking decoder is
available at www.micron.com/decoder.
The 512Mb Mobile DDR SDRAM is a high-speed CMOS, dynamic random-access
memory containing 536,870,912 bits. It is internally configured as a quad-bank DRAM.
Each of the x16’s 134,217,728-bit banks is organized as 8,192 rows by 1,024 columns by
16 bits. Each of the x32’s 134,217,728-bit banks is organized as 8,192 rows by 512
columns by 32 bits. In the reduced page-size (LG) option, each of the x32’s 134,217,728-
bit banks are organized as 16,384 rows by 256 columns by 32 bits.
term is to be interpreted as any and all DQ collectively, unless specifically stated
otherwise. Additionally, the x16 is divided into two bytes: the lower byte and the upper
byte. For the lower byte (DQ0–DQ7), DM refers to LDM and DQS refers to LDQS. For
the upper byte (DQ8–DQ15), DM refers to UDM and DQS refers to UDQS. The x32 is
divided into four bytes. For DQ0–DQ7, DM refers to DM0 and DQS refers to DQS0. For
DQ8–DQ15, DM refers to DM1 and DQS refers to DQS1. For DQ16–DQ23, DM refers
to DM2 and DQS refers to DQS2, and for DQ24–DQ31, DM refers to DM3 and DQS
refers to DQS3.
gram may have been simplified to convey a topic and may not be inclusive of all
requirements.
MT
46
H 32M16 LF
BF
5
-6
L
Micron Technology, Inc., reserves the right to change products or specifications without notice.
512Mb: x16, x32 Mobile DDR SDRAM
IT
:B
FBGA Part Marking Decoder
Design Revision
:B = Second generation
Operating Temperature
Blank = Commercial (0°C to +70°C)
IT = Industrial (–40°C to +85°C)
Power
Blank = Standard I
L = Low Power I
Cycle Time
–5 = 5ns
–54 = 5.4ns
–6 = 6ns
–75 = 7.5ns
t
t
CK, CL = 3
CK, CL = 3
©2004 Micron Technology, Inc. All rights reserved
t
t
CK, CL = 3
CK, CL = 3
DD
DD
2/I
2/I
DD
DD
6
6