mt46h32m16lf Micron Semiconductor Products, mt46h32m16lf Datasheet - Page 47

• Manufacturer Part Number: mt46h32m16lf
• Description: 512mb X16, X32 Mobile Ddr Sdram
• Manufacturer: Micron Semiconductor Products

Figure 11:
PDF: 09005aef82ce3074/Source: 09005aef82ce20c9
ddr_mobile_sdram_cmd_op_timing_dia_fr3.08__3.fm - Rev. D 05/08 EN
Command
BA0, BA1
Address
DQS
CK#
DQ
CK
PRE
T0
SRR Timing
1
Notes:
t
NOP
RP
T1
1. All banks must be idle prior to status register read.
2. NOP or DESELECT commands are required between LMR and READ command (
3. CAS latency is pre-determined by the programming of the mode register. CL = 3 is shown as
4. Burst length is fixed to 2 for SRR regardless of the value programmed by the mode register.
5. The second bit of the data-out burst is a “Don’t Care.”
between READ and next VALID command (
an example only.
BA0 = 1
BA1 = 0
LMR
0
T2
t
NOP
SRR
T3
2
47
READ
T4
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
SRC).
NOP
T5
CL = 3
3
NOP
T6
t
SRC
Mobile DDR SDRAM
©2007 Micron Technology, Inc. All rights reserved
NOP
T7
out
SRR
4
Operations
Don’t
Care
t
SRR) and
5
Don’t Care
Valid
T8