mt46h32m16lf Micron Semiconductor Products, mt46h32m16lf Datasheet - Page 58

• Manufacturer Part Number: mt46h32m16lf
• Description: 512mb X16, X32 Mobile Ddr Sdram
• Manufacturer: Micron Semiconductor Products

Figure 21:
PDF: 09005aef82ce3074/Source: 09005aef82ce20c9
ddr_mobile_sdram_cmd_op_timing_dia_fr3.08__3.fm - Rev. D 05/08 EN
DQ (First data no longer valid)
DQ (First data no longer valid)
DQ and DQS, collectively
DQS0/DQS1/DQS2/DQS3
DQ (Last data valid)
DQ (Last data valid)
Data Output Timing –
Notes:
CK#
DQ
DQ
DQ
DQ
DQ
DQ
CK
6, 7
2
2
2
2
2
2
2
2
1. DQ transitioning after DQS transitions define the
2. Byte 0 is DQ0...7, byte 1 is DQ8...15, byte 2 is DQ16...23, byte 3 is DQ24...31.
3.
4.
5.
6. The data valid window is derived for each DQS transition and is
7. DQ0–7 and DQS0 for byte 0; DQ8–15 and DQS1 for byte 1; DQ16–23 and DQS2 for byte 2;
T1
t
DQS transition and ends with the last valid DQ transition.
t
t
DQ23–31 and DQS3 for byte 3.
DQSQ is derived at each DQS clock edge and is not cumulative over time and begins with
QH is derived from
HP is the lesser of
t
HP
5
t
DQSQ,
t
HP
t
5
DQSQ
t
QH
T2
t
4
Data valid
CL or
t
window
t
3
QH, and Data Valid Window (x32)
HP:
T2
T2
T2
t
HP
t
t
QH =
5
CH clock transition collectively when a bank is active.
t
T2n
DQSQ
58
t
QH
t
Data valid
4
HP -
window
3
t
T2n
T2n
T2n
HP
5
t
QHS.
T3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
DQSQ
t
QH
4
t
Data valid
HP
3
window
5
T3
T3
T3
T3n
t
DQSQ window.
t
DQSQ
t
t
HP
QH
5
4
Data valid
3
window
T4
T3n
T3n
T3n
Mobile DDR SDRAM
©2007 Micron Technology, Inc. All rights reserved
t
QH -
t
DQSQ.
Operations