mt46h32m16lf Micron Semiconductor Products, mt46h32m16lf Datasheet - Page 44

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mt46h32m16lf

Manufacturer Part Number
mt46h32m16lf
Description
512mb X16, X32 Mobile Ddr Sdram
Manufacturer
Micron Semiconductor Products
Datasheet

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CAS Latency (CL)
Figure 9:
Operating Mode
Extended Mode Register
PDF: 09005aef82ce3074/Source: 09005aef82ce20c9
ddr_mobile_sdram_cmd_op_timing_dia_fr3.08__3.fm - Rev. D 05/08 EN
CAS Latency
The CAS latency is the delay, in clock cycles, between the registration of a READ
command and the availability of the first output data. The latency can be set to 2 or 3
clocks, as shown in Figure 17 on page 44.
For CL = 3, if the READ command is registered at clock edge n, then the data will nomi-
nally be available at (n + 2 clocks +
clock edge n, then the data will be nominally be available at (n + 1 clock +
Command
The normal operating mode is selected by issuing a LOAD MODE REGISTER command
with bits A7–An each set to zero, and bits A0–A6 set to the desired values.
All other combinations of values for A7–An are reserved for future use. Reserved states
should not be used because unknown operation or incompatibility with future versions
may result.
The extended mode register controls additional functions beyond those set by the mode
registers. These additional functions include drive strength, TCSR, and PASR.
The extended mode register is programmed via the LOAD MODE REGISTER command
with BA0 = 0 and BA1 = 1. Information in the extended mode register will be retained
until it is programmed again, the device goes into deep power-down mode, or the device
loses power.
Command
DQS
DQS
CK#
DQ
CK#
DQ
CK
CK
READ
READ
T0
T0
CL - 1
CL = 2
CL - 1
NOP
NOP
T1
T1
44
t
AC
t
CL = 3
AC). For CL = 2, if the READ command is registered at
T1n
Transitioning Data
Micron Technology, Inc., reserves the right to change products or specifications without notice.
D
T2
NOP
OUT
NOP
n
T2
t
AC
T2n
D
n + 1
T2n
OUT
D
D
n + 2
T3
OUT
NOP
NOP
n
OUT
T3
Don’t Care
T3n
Mobile DDR SDRAM
D
n + 3
D
n + 1
©2007 Micron Technology, Inc. All rights reserved
T3n
OUT
OUT
Operations
t
AC).

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