mt46h32m16lf Micron Semiconductor Products, mt46h32m16lf Datasheet - Page 45

• Manufacturer Part Number: mt46h32m16lf
• Description: 512mb X16, X32 Mobile Ddr Sdram
• Manufacturer: Micron Semiconductor Products

Temperature-Compensated Self Refresh (TCSR)
Partial-Array Self Refresh (PASR)
Output Drive Strength
PDF: 09005aef82ce3074/Source: 09005aef82ce20c9
ddr_mobile_sdram_cmd_op_timing_dia_fr3.08__3.fm - Rev. D 05/08 EN
On this version of the Mobile DDR SDRAM, a temperature sensor is implemented for
automatic control of the self refresh oscillator. Programming of the TCSR bits will have
no effect on the device. The self refresh oscillator will continue to refresh at the factory
programmed optimal rate for the device temperature.
For further power savings during self refresh, the PASR feature allows the controller to
select the amount of memory that will be refreshed during self refresh. The refresh
options are:
• Full array: banks 0, 1, 2, and 3
• Half array: banks 0 and 1
• Quarter array: bank 0
• Eighth array: bank 0 with row address most significant bit (MSB) = 0
• Sixteenth array: bank 0 with row address MSB = 0 and row address MSB - 1 = 0
WRITE and READ commands can still occur during standard operation, but only the
selected regions of the array will be refreshed during self refresh. Data in regions that are
not selected will be lost.
Because the Mobile DDR SDRAM is designed for use in smaller systems that are typically
point-to-point connections, an option to control the drive strength of the output buffers
is provided. Drive strength should be selected based on the expected loading of the
memory bus. There are four allowable settings for the output drivers: 25Ω, 37Ω, 55Ω, and
80Ω internal impedance. These are full, three-quarter, one-half, and one-quarter drive
strengths, respectively.
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Micron Technology, Inc., reserves the right to change products or specifications without notice.
Mobile DDR SDRAM
©2007 Micron Technology, Inc. All rights reserved
Operations