mt46h32m16lf Micron Semiconductor Products, mt46h32m16lf Datasheet - Page 31

• Manufacturer Part Number: mt46h32m16lf
• Description: 512mb X16, X32 Mobile Ddr Sdram
• Manufacturer: Micron Semiconductor Products

Figure 3:
PRECHARGE
PDF: 09005aef82ce3074/Source: 09005aef82ce20c9
ddr_mobile_sdram_cmd_op_timing_dia_fr3.08__3.fm - Rev. D 05/08 EN
WRITE Command
Notes:
tered LOW, the corresponding data will be written to memory; if the DM signal is regis-
tered HIGH, the corresponding data inputs will be ignored, and a WRITE will not be
executed to that byte/column location.
If a WRITE or a READ is in progress, the entire data burst must be complete prior to stop-
ping the clock (see the “Stopping the External Clock” section on page 80). A burst
completion for WRITEs is defined when the write postamble and
fied.
BA0, BA1
1. EN AP = enable auto precharge; DIS AP = disable auto precharge.
The PRECHARGE command is used to deactivate the open row in a particular bank or
the open row in all banks. The bank(s) will be available for a subsequent row access a
specified time (
whether one or all banks are to be precharged, and in the case where only one bank is to
be precharged, inputs BA0 and BA1 select the bank. Otherwise, BA0 and BA1 are treated
as “Don’t Care.” After a bank has been precharged, it is in the idle state and must be acti-
vated prior to any READ or WRITE commands being issued to that bank.
Address
RAS#
CAS#
WE#
CK#
CKE
A10
CS#
CK
HIGH
t
RP) after the PRECHARGE command is issued. Input A10 determines
Column
DIS AP
Bank
EN AP
Don’t Care
31
Micron Technology, Inc., reserves the right to change products or specifications without notice.
Mobile DDR SDRAM
©2007 Micron Technology, Inc. All rights reserved
t
WR or
t
WTR are satis-
Commands