LFEC10E-3F256C Lattice Semiconductor Corp., LFEC10E-3F256C Datasheet - Page 95
LFEC10E-3F256C
Manufacturer Part Number
LFEC10E-3F256C
Description
Latticeecp/ec Family of Fpga Devices Has Been Optimized to Deliver Mainstream Fpga Features at Low Cost.for Maximum Performance And Value, The Latticeecp (EConomy Plus) Fpga Concept Combines an Efficient Fpgafabric With High-speed Dedicated Functions
Manufacturer
Lattice Semiconductor Corp.
Datasheet
1.LFEC10E-3F256C.pdf
(231 pages)
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Lattice Semiconductor
The value of this external resistor will depend on the PCI clamp diode characteristics. Refer to the LatticeECP/EC
Data Sheet for the voltage vs. current data for the PCI clamp diode. This data can be used to calculate the value of
the external resistor as follows:
Software sysIO Attributes
sysIO attributes can be specified in the HDL, using the Preference Editor GUI or in the ASCII Preference file (.prf)
file directly. Appendices A, B and C list examples of how these can be assigned using each of the methods men-
tioned above. This section describes in detail each of these attributes.
IO_TYPE
This is used to set the sysIO standard for an I/O. The V
the attribute names itself. There is no separate attribute to set the V
I/O types.
Table 7-4. O_TYPE Attribute Values
Default
LVDS 2.5V
Emulated LVDS 2.5V
Bus LVDS 2.5V
LVPECL 3.3V
HSTL18 Class I, II and III
Differential HSTL 18 Class I, II and III
HSTL 15 Class I and III
Differential HSTL 15 Class I and III
SSTL 33 Class I and II
Differential SSTL 33 Class I and II
SSTL 25 Class I and II
Differential SSTL 25 Class I and II
SSTL 18 Class I
Differential SSTL 18 Class I
LVTTL
3.3V LVCMOS
2.5V LVCMOS
1.8V LVCMOS
1.5V LVCMOS
1.2V LVCMOS
3.3V LVCMOS, Open Drain
sysIO Signaling Standard
External Resistor Value = (5V - Max. Input Voltage)/Current at Max. Input Voltage
7-7
CCIO
LVCMOS18 (for UV)
LVCMOS12 (for LV)
LVDS25
LVDS25E
BLVDS25
LVPECL33
HSTL18_I,
HSTL18_II,
HSTL18_III
HSTL18D_I
HSTL18D_II
HSTL18D_III
HSTL15_I
HSTL15_III
HSTL15D_I
HSTL15D_III
SSTL33_I
SSTL33_II
SSTL33D_I
SSTL3D_II
SSTL25_I
SSTL25_II
SSTL25D_I
SSTL25D_II
SSTL18_I
SSTL18D_I
LVTTL33_OD
LVCMOS33
LVCMOS25
LVCMOS18
LVCMOS15
LVCMOS12
LVCMOS33_OD
required to set these I/O standards are embedded in
1
1
2
1
2
CCIO
2
2
2
2
2
2
2
LatticeECP/EC sysIO Usage Guide
2
requirements. Table 7-4 lists the available
IO_TYPE
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