LFEC10E-3F256C Lattice Semiconductor Corp., LFEC10E-3F256C Datasheet - Page 150

• Manufacturer Part Number: LFEC10E-3F256C
• Description: Latticeecp/ec Family of Fpga Devices Has Been Optimized to Deliver Mainstream Fpga Features at Low Cost.for Maximum Performance And Value, The Latticeecp (EConomy Plus) Fpga Concept Combines an Efficient Fpgafabric With High-speed Dedicated Functions
• Manufacturer: Lattice Semiconductor Corp.

Lattice Semiconductor
Appendix B. VHDL Example of a DDR Memory Interface Using
LatticeECP/EC Devices
DDR Input Module
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_arith.all;
library ec;
use ec.components.all;
entity ddr_in is
end ddr_in;
architecture structure of ddr_in is
component IDDRXB
end component;
component DQSBUFB
end component;
component DQSDLL
end component;
port(
port(
port(
D
ECLK
SCLK
CE
DDRCLKPOL: in STD_LOGIC;
LSR:
QA
QB
DQSI
CLK
READ
DQSDEL
DDRCLKPOL: out STD_LOGIC;
DQSC:
PRMBDET
DQSO
CLK
UDDCNTL
DQSDEL
RST: in STD_LOGIC;
LOCK
port(DQ
: in STD_LOGIC;
: in STD_LOGIC;
in STD_LOGIC;
: out STD_LOGIC;
: out STD_LOGIC);
: in STD_LOGIC;
: in STD_LOGIC;
: in STD_LOGIC;
DQS : in std_logic;
CLK : in std_logic;
RESET : in std_logic;
UDDCNTL :in std_logic;
: in STD_LOGIC;
: in STD_LOGIC;
: in STD_LOGIC;
out STD_LOGIC;
READ: in std_logic;
INDDR_DA: out std_logic_vector(7 downto 0);
INDDR_DB: out std_logic_vector(7 downto 0);
DQSCIB : out std_logic;
PRMBDET : out std_logic;
DLL_LOCK: out std_logic);
: in STD_LOGIC;
: out STD_LOGIC);
: out STD_LOGIC;
: out STD_LOGIC);
: in STD_LOGIC;
: in std_logic_vector(7 downto 0);
: out STD_LOGIC;
9-21
Lattice ECP/EC DDR Usage Guide