LFEC10E-3F256C Lattice Semiconductor Corp., LFEC10E-3F256C Datasheet - Page 151

• Manufacturer Part Number: LFEC10E-3F256C
• Description: Latticeecp/ec Family of Fpga Devices Has Been Optimized to Deliver Mainstream Fpga Features at Low Cost.for Maximum Performance And Value, The Latticeecp (EConomy Plus) Fpga Concept Combines an Efficient Fpgafabric With High-speed Dedicated Functions
• Manufacturer: Lattice Semiconductor Corp.

Lattice Semiconductor
attribute DEL_VAL : string;
attribute DEL_ADJ : string;
attribute LOCK_SENSITIVITY : string;
attribute DEL_VAL of U8:label is "10";
attribute DEL_ADJ of U8:label is "PLUS";
attribute DEL_VAL of U9:label is "10";
attribute DEL_ADJ of U9:label is "PLUS";
attribute LOCK_SENSITIVITY of U9:label is "HIGH";
signal vcc_net : std_logic;
signal gnd_net : std_logic;
signal dqsbuf, dqsdel,ddrclkpol_sig: std_logic;
signal INDDR_DA_Q: std_logic_vector(7 downto 0);
signal INDDR_DB_Q: std_logic_vector(7 downto 0);
begin
UL0 : IDDRXB PORT MAP( D
UL1 : IDDRXB PORT MAP( D
UL3 : IDDRXB PORT MAP( D
vcc_net <= '1';
gnd_net <= '0';
UL2 : IDDRXB PORT MAP( D
ECLK
SCLK
CE
DDRCLKPOL => ddrclkpol_sig,
LSR
QA
QB
CE
DDRCLKPOL => ddrclkpol_sig,
LSR
QA
QB
ECLK
SCLK
CE
DDRCLKPOL => ddrclkpol_sig,
LSR
QA
QB
ECLK
SCLK
CE
DDRCLKPOL => ddrclkpol_sig,
LSR
QA
QB
ECLK
SCLK
=> dqsbuf,
=> CLK,
=> vcc_net,
=> RESET,
=> INDDR_DA_Q(0),
=> INDDR_DB_Q(0));
=> vcc_net,
=> RESET,
=> INDDR_DA_Q(1),
=> INDDR_DB_Q(1));
=> dqsbuf,
=> CLK,
=> vcc_net,
=> RESET,
=> INDDR_DA_Q(2),
=> INDDR_DB_Q(2));
=> dqsbuf,
=> CLK,
=> vcc_net,
=> RESET,
=> INDDR_DA_Q(3),
=> INDDR_DB_Q(3));
=> DQ(0),
=> DQ(1),
=> dqsbuf,
=> CLK,
=> DQ(3),
=> DQ(2),
9-22
Lattice ECP/EC DDR Usage Guide