LFEC10E-3F256C Lattice Semiconductor Corp., LFEC10E-3F256C Datasheet - Page 141

• Manufacturer Part Number: LFEC10E-3F256C
• Description: Latticeecp/ec Family of Fpga Devices Has Been Optimized to Deliver Mainstream Fpga Features at Low Cost.for Maximum Performance And Value, The Latticeecp (EConomy Plus) Fpga Concept Combines an Efficient Fpgafabric With High-speed Dedicated Functions
• Manufacturer: Lattice Semiconductor Corp.

Lattice Semiconductor
Figure 9-11. Read Data Transfer When DDRCLKPOL=1
DDRCLKPOL
PRMBDET
DQSPAD
DQSO
IPOS0
IPOS1
READ
DQSI
CLK
CLK
(10)
(10)
DQ
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
Notes -
(10) IPOS0 and IPOS1 are the DDR data both synchronized to the positive edge of CLK.
(2) DQSPAD is the DQS strobe at the PAD from the DDR memory.
(3) DQSI is the DQS Strobe signal at the input of the DQSBUFB primitive
(4) DQ is the DDR data coming from the DDR memory. This data bus is edge aligned to the DQSI.
(5) PRMBDET is the Preable detect signal generated in the DQSBUFB primitive.
(6) DQSO is the 90 degree delayed DQS. This is the output of the DQSBUFB
(7) CLK is the clock coming from the core logic.
(8) DDRCLKPOL signal is generated in by the DQS Transition detect logic represented in software by
(9) As DDRCLKPOL = 1 , the CLK is inverted before enters the IDDRXB. This CLK is connected to the
(1) READ is internally generated and should go high when the READ command (to control the DDR-RAM)
is initially asserted. READ is used to generate the clock edge to sample the state of the CLK.
primitive and is used to clock the first set of DDR registers. This is connected to the ECLK input of
IDDRXB primitive.
DQSBUFB primitive.
In this case 2, the DDRCLKPOL=1 as the CLK is HIGH at the 1
SCLK input of the IDDRXB primitive. The DQ data will be synchronized to this CLK before it enters the
FPGA.
First data synchronous with DQSI
Capture first data
Phase=90
9-12
Phase=360 to Phase=540
Transfer first data to core
Transfer first data
Phase=270
st
Transfer second data
Lattice ECP/EC DDR Usage Guide
DQSI transition.
Phase=630