LFEC10E-3F256C Lattice Semiconductor Corp., LFEC10E-3F256C Datasheet - Page 180
LFEC10E-3F256C
Manufacturer Part Number
LFEC10E-3F256C
Description
Latticeecp/ec Family of Fpga Devices Has Been Optimized to Deliver Mainstream Fpga Features at Low Cost.for Maximum Performance And Value, The Latticeecp (EConomy Plus) Fpga Concept Combines an Efficient Fpgafabric With High-speed Dedicated Functions
Manufacturer
Lattice Semiconductor Corp.
Datasheet
1.LFEC10E-3F256C.pdf
(231 pages)
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LatticeECP-DSP sysDSP Usage Guide
MAC Module
The MAC Module configures multiply accumulate elements to be packed into the primitives. The Basic mode,
shown in Figure 11-4, consists of one clock (optional), one clock enable and one reset tied to all registers. Because
of the Accumulator, the output register is automatically enabled. The SRI and SRO ports can only be enabled if
inputs are less than 18 bits. The Accumsload loads the accumulator with the value from the multiplier. This is
required to initialize and load the first value of the accumulation. The Advanced mode, shown in Figure 11-5, allows
finer control over the registers. In the Advanced mode you can control each register with independent clocks, clock
enables and resets.
Figure 11-4. MAC Mode Basic Set-up
Figure 11-5. MAC Mode Advanced Set-up
11-4
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