LFEC10E-3F256C Lattice Semiconductor Corp., LFEC10E-3F256C Datasheet - Page 66

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LFEC10E-3F256C

Manufacturer Part Number
LFEC10E-3F256C
Description
Latticeecp/ec Family of Fpga Devices Has Been Optimized to Deliver Mainstream Fpga Features at Low Cost.for Maximum Performance And Value, The Latticeecp (EConomy Plus) Fpga Concept Combines an Efficient Fpgafabric With High-speed Dedicated Functions
Manufacturer
Lattice Semiconductor Corp.
Datasheet

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Lattice Semiconductor
Switching Test Conditions
Figure 3-12 shows the output test load that is used for AC testing. The specific values for resistance, capacitance,
voltage, and other test conditions are shown in Figure 3-5.
Figure 3-12. Output Test Load, LVTTL and LVCMOS Standards
Table 3-5. Test Fixture Required Components, Non-Terminated Interfaces
LVTTL and other LVCMOS settings (L -> H, H -> L)
LVCMOS 2.5 I/O (Z -> H)
LVCMOS 2.5 I/O (Z -> L)
LVCMOS 2.5 I/O (H -> Z)
LVCMOS 2.5 I/O (L -> Z)
Note: Output test conditions for all other interfaces are determined by the respective standards.
Test Condition
*CL Includes Test Fixture and Probe Capacitance
DUT
V
R1
T
3-24
188
R
1
CL*
0pF
0pF
C
L
Test Point
DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
LVCMOS 3.3 = 1.5V
LVCMOS 2.5 = V
LVCMOS 1.8 = V
LVCMOS 1.5 = V
LVCMOS 1.2 = V
V
V
V
V
OH
OL
CCIO
CCIO
+ 0.15
- 0.15
/2
/2
Timing Ref.
CCIO
CCIO
CCIO
CCIO
/2
/2
/2
/2
V
V
V
V
V
OH
OH
OL
OL
T

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