PCI9030-AA60BI PLX Technology, PCI9030-AA60BI Datasheet - Page 168

• Manufacturer Part Number: PCI9030-AA60BI
• Description: Peripheral Drivers & Components (PCIs) 32-bit 33MHz PCI v.2.2-compliant
• Manufacturer: PLX Technology

Specifications of PCI9030-AA60BI

• Package / Case: FPBGA-180
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Lead Free Status / Rohs Status: No RoHS Version Available

Section 11
Pin Description
Table 11-12. Non-Multiplexed Bus Mode Interface Pins (Continued)
11-16
LA[23:2]
LBE[3:0]#
LD[31:0]
LW/R#
Symbol
Address Bus
Byte Enables
Data Bus
Write/Read
Signal Name
Total
Pins
22
32
4
1
12 mA
12 mA
12 mA
12 mA
Type
Pin
TS
TS
I/O
TS
TS
O
O
O
PQFP Pin
72-74, 77,
55, 58-60
131-127,
125-123,
121-118,
116-114,
Number
102, 104
111-105
61-65,
67-69,
79-84,
86-87,
89-93,
95-99,
142
D14, D12, E11, E14,
L10, N11, M11, P11,
L11, N12, N13, M12,
E12, F14, F10, F12,
L13, K10, K11, L14,
µBGA Pin Number
L6, P6, K7, N7, M7,
P7, L8, N8, P8, L9,
N9, P9, M10, P10,
M13, N14, M14,
C13, D11, C14,
F13, G14, G10,
G12, H14, H11,
H12, H13, H10,
M5, P5, M6, N6
K12, K14, J13
J14, J11
A11
© 2002 PLX Technology, Inc. All rights reserved.
Non-Multiplexed Local Bus Mode Pinout
Carries the upper 22 bits of the 28-bit physical
Address Bus. Increments during bursts indicate
successive Data cycles.
Encoded, based on the bus-width configuration:
32-Bit Bus
Four byte enables indicate which of the four
bytes are active during a data cycle:
•
•
•
•
16-Bit Bus
LBE[3, 1:0]# are encoded to provide BHE#,
LA1, and BLE#, respectively:
•
•
•
•
8-Bit Bus
LBE[1:0]# are encoded to provide LA[1:0],
respectively:
•
•
•
•
Carries 8-, 16-, or 32-bit data quantities,
depending upon a Target bus-width
configuration:
•
•
•
Asserted low for reads and high for writes.
LBE3# Byte Enable 3 = LD[31:24]
LBE2# Byte Enable 2 = LD[23:16]
LBE1# Byte Enable 1 = LD[15:8]
LBE0# Byte Enable 0 = LD[7:0]
LBE3# Byte High Enable (BHE#) = LD[15:8]
LBE2# Unused
LBE1# Address bit 1 (LA1)
LBE0# Byte Low Enable (BLE#) = LD[7:0]
LBE3# Unused
LBE2# Unused
LBE1# Address bit 1 (LA1)
LBE0# Address bit 0 (LA0)
8-bit = LD[7:0]
16-bit = LD[15:0]
32-bit = LD[31:0]
PCI 9030 Data Book Version 1.4
Function