PCI9030-AA60BI PLX Technology, PCI9030-AA60BI Datasheet - Page 126

• Manufacturer Part Number: PCI9030-AA60BI
• Description: Peripheral Drivers & Components (PCIs) 32-bit 33MHz PCI v.2.2-compliant
• Manufacturer: PLX Technology

Specifications of PCI9030-AA60BI

• Package / Case: FPBGA-180
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Lead Free Status / Rohs Status: No RoHS Version Available

Section 10
Registers
Register 10-25. (PMCAPID; PCI:40h) Power Management Capability ID
Register 10-26. (PMNEXT; PCI:41h) Power Management Next Capability Pointer
Register 10-27. (PMC; PCI:42h) Power Management Capabilities
10-12
Bit
Bit
15:11
7:0
7:0
Bit
2:0
8:6
10
3
4
5
9
Power Management Capability ID.
Next_Cap Pointer. Provides an offset into PCI Configuration space for location
of the next item in the New Capabilities Linked List. Bits [1:0] are reserved
by PCI r2.2, and should be set to 00 (the byte value points to an Lword
boundary). If Power Management is the last capability in the list, set to 0h.
Version. The value 001 indicates compliance with PCI Bus Power
Management Interface Specification, Revision 1.0, and its definition for
PMC register format. This value can be changed in serial EEPROM to 010
to indicate compliance with PCI Power Mgmt. r1.1. (Refer to PCI 9030 Design
Note #1 for PMC register definition under PCI Power Mgmt. r1.1.)
PCI Clock Required for PME# Signal. When set to 1, indicates a function
relies on PCI clock presence for PME# operation. The PCI 9030 does
not require the PCI clock for PME#, so this bit should be set to 0 in
serial EEPROM.
Auxiliary Power Source. Because the PCI 9030 does not support PME#
while in a D
Device-Specific Initialization (DSI). When set to 1, the PCI 9030 requires
special initialization following a transition to a D
a generic class device driver is able to use it.
Reserved.
D
Not Supported.
D
Not Supported.
PME_Support. Indicates power states in which the PCI 9030 may
assert PME#. Values:
XXXX1 = PME# can be asserted from D 0
XXXXX = The PCI 9030 does not support the D 1 power state
XXXXX = The PCI 9030 does not support the D 2 power state
X1XXX = PME# can be asserted from D 3hot
XXXXX = PME# cannot be asserted from D 3cold
1
2
_Support. When set to 1, the PCI 9030 supports the D
_Support. When set to 1, the PCI 9030 supports the D
3
cold state, this bit is always set to 0. Not Supported.
Description
Description
Description
0
uninitialized state before
1
2
power state.
power state.
© 2002 PLX Technology, Inc. All rights reserved.
Read
Read
Read
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
PCI 9030 Data Book Version 1.4
PCI Configuration Registers
EEPROM
EEPROM
EEPROM
EEPROM
EEPROM
Write
[15]: No
Write
[14:11]:
Serial
Write
Serial
Serial
Serial
Serial
No
No
No
No
No
Value after
Value after
Value after
Reset
Reset
Reset
01001
48h
1h
001
000
0
0
0
0
0