PCI9030-AA60BI PLX Technology, PCI9030-AA60BI Datasheet - Page 121

no-image

PCI9030-AA60BI

Manufacturer Part Number
PCI9030-AA60BI
Description
Peripheral Drivers & Components (PCIs) 32-bit 33MHz PCI v.2.2-compliant
Manufacturer
PLX Technology
Datasheets

Specifications of PCI9030-AA60BI

Package / Case
FPBGA-180
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Lead Free Status / Rohs Status
No RoHS Version Available

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PCI9030-AA60BI
Quantity:
1 400
Part Number:
PCI9030-AA60BI
Manufacturer:
PLX
Quantity:
250
Part Number:
PCI9030-AA60BI
Manufacturer:
XILINX
0
Part Number:
PCI9030-AA60BI F
Manufacturer:
FUJI
Quantity:
4 300
Part Number:
PCI9030-AA60BIF
Manufacturer:
PLX
Quantity:
1 400
Part Number:
PCI9030-AA60BIF
Manufacturer:
PLX
Quantity:
246
Part Number:
PCI9030-AA60BIF
Manufacturer:
PLX
Quantity:
20 000
PCI Configuration Registers
Register 10-10. (PCIBAR0; PCI:10h) PCI Base Address 0 for Memory Accesses to Local Configuration Registers
Note:
Register 10-11. (PCIBAR1; PCI:14h) PCI Base Address 1 for I/O Accesses to Local Configuration Registers
Note:
PCI 9030 Data Book Version 1.4
© 2002 PLX Technology, Inc. All rights reserved.
31:7
31:7
Bit
Bit
2:1
6:4
6:2
0
3
0
1
PCIBAR0 can be enabled or disabled by using CNTRL[13:12].
PCIBAR1 can be enabled or disabled by using CNTRL[13:12].
Memory Space Indicator. Writing 0 indicates the register maps into
Memory space. Writing 1 indicates the register maps into I/O space.
Note:
Register Location. Values:
00 = Locate anywhere in 32-bit Memory Address space
01 = PCI r2.1, Locate below 1-MB Memory Address space
10 = Locate anywhere in 64-bit Memory Address space
11 = Reserved
Note:
Prefetchable. Writing 1 indicates there are no side effects on reads. Does not
affect PCI 9030 operation.
Note:
Memory Base Address. Memory base address for access to
Local Configuration registers (requires 128 bytes).
Note:
Memory Base Address. Memory base address for access to
Local Configuration registers.
Memory Space Indicator. Writing 0 indicates the register maps into
Memory space. Writing 1 indicates the register maps into I/O space.
Note:
Reserved.
I/O Base Address. Base Address for I/O access to Local Configuration
registers (requires 128 bytes).
Note:
I/O Base Address. Base Address for I/O access to Local Configuration
registers.
PCI r2.2, Reserved
Hardwired to 0.
Hardwired to 00.
Hardwired to 0.
Hardwired to 000.
Hardwired to 1.
Hardwired to 0h.
Description
Description
Read
Read
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Write
Write
Yes
Yes
No
No
No
No
No
No
No
Value after
Value after
Section 10
Reset
Reset
Registers
000
0h
0h
00
0h
1
0
0
0
10-7

Related parts for PCI9030-AA60BI