PCI9030-AA60BI PLX Technology, PCI9030-AA60BI Datasheet - Page 163

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PCI9030-AA60BI

Manufacturer Part Number
PCI9030-AA60BI
Description
Peripheral Drivers & Components (PCIs) 32-bit 33MHz PCI v.2.2-compliant
Manufacturer
PLX Technology
Datasheets

Specifications of PCI9030-AA60BI

Package / Case
FPBGA-180
Maximum Operating Temperature
+ 125 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Operating Supply Voltage
3.3 V
Lead Free Status / Rohs Status
No RoHS Version Available

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Pinout Common to All Bus Modes
Table 11-10. Local Bus Mode Independent Interface Pins (Continued)
PCI 9030 Data Book Version 1.4
© 2002 PLX Technology, Inc. All rights reserved.
LPMESET
LPMINT#
LREQ
LRESETo#
MODE
Total
Symbol
Local Power
Management
Event Set
Local Power
Management
Interrupt
Local Bus
Request
Local Bus
Reset Out
Bus Mode
Signal Name
Total
Pins
19
1
1
1
1
1
12 mA
12 mA
Type
Pin
TP
TP
O
O
I
I
I
PQFP Pin
Number
103
126
151
149
76
µBGA Pin
Number
D13
J12
E8
D9
K9
As an input, the Local Initiator can issue
LPMESET to the PCI 9030 in the case of a
Power Management Wake-Up event. LPMESET
must be asserted to the PCI 9030 no less than
one Local Clock pulse. The PCI 9030 latches the
LPMESET assertion, sets the PME_Status bit
(PMCSR[15]), and asserts PME# to the PCI Bus,
if enabled.
Could be used for Local Power Management
Events.
The PCI 9030 drives the interrupt to the external
Master to request a Power State Change.
Asserted by a Local Bus Master to request Local
Bus use. The PCI 9030 can be made master
of the Local Bus by pulling LREQ low (or by
grounding LREQ).
Asserted when the PCI 9030 chip is reset.
Can be used to drive the Local processor’s
RESET# input.
Selects the PCI 9030 Bus Operation mode.
Values:
0 = Non-Multiplexed mode
1 = Multiplexed mode
Note:
at power-on.
The MODE input level must be stable
Function
Pin Description
Section 11
11-11

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