PCI9030-AA60BI PLX Technology, PCI9030-AA60BI Datasheet - Page 134

• Manufacturer Part Number: PCI9030-AA60BI
• Description: Peripheral Drivers & Components (PCIs) 32-bit 33MHz PCI v.2.2-compliant
• Manufacturer: PLX Technology

Specifications of PCI9030-AA60BI

• Package / Case: FPBGA-180
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Lead Free Status / Rohs Status: No RoHS Version Available

Section 10
Registers
Register 10-45. (LAS2BA; 1Ch) Local Address Space 2 Local Base Address (Remap)
Register 10-46. (LAS3BA; 20h) Local Address Space 3 Local Base Address (Remap)
Register 10-47. (EROMBA; 24h) Expansion ROM Local Base Address (Remap)
10-20
31:28
31:28
27:11
31:28
27:4
27:4
10:0
Bit
Bit
Bit
3:2
3:2
0
1
0
1
Space 2 Enable. Writing 1 enables decoding of PCI addresses for PCI Target
access to Local Address Space 2. Writing 0 disables decoding. PCIBAR4 can
be enabled or disabled by setting or clearing this bit.
Reserved.
If Local Address Space 2 is mapped into Memory space, bits are not used.
When mapped into I/O space, included with bits [27:4] for remapping.
Remap PCIBAR4 Base Address to Local Address Space 2 Base Address.
The PCIBAR4 base address translates to the Local Address Space 2 Base
Address programmed in this register. A PCI Target access to an offset from
PCIBAR4 maps to the same offset from this Local Base Address.
Note:
Reserved. (Local Address bits [31:28] do not exist in the PCI 9030.)
Space 3 Enable. Writing 1 enables decoding of PCI addresses for PCI Target
access to Local Address Space 3. Writing 0 disables decoding. PCIBAR5 can
be enabled or disabled by setting or clearing this bit.
Reserved.
If Local Address Space 3 is mapped into Memory space, bits are not used.
When mapped into I/O space, included with bits [27:4] for remapping.
Remap PCIBAR5 Base Address to Local Address Space 3 Base Address.
The PCIBAR5 base address translates to the Local Address Space 3 Base
Address programmed in this register. A PCI Target access to an offset from
PCIBAR5 maps to the same offset from this Local Base Address.
Note:
Reserved. (Local Address bits [31:28] do not exist in the PCI 9030.)
Reserved.
Remap PCI Expansion ROM Space into Local Address Space. Bits in this
register remap (replace) the PCI Address bits used in decode as Local
Address bits.
Note:
Reserved. (Local Address bits [31:28] do not exist in the PCI 9030.)
Remap Address value must be a Range multiple (not the Range register).
Remap Address value must be a Range multiple (not the Range register).
Remap Address value must be a Range multiple (not the Range register).
Description
Description
Description
© 2002 PLX Technology, Inc. All rights reserved.
Read
Read
Read
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Local Configuration Registers
PCI 9030 Data Book Version 1.4
Write
Write
Write
Yes
Yes
Yes
No
No
Yes
Yes
Yes
Yes
No
No
No
No
0000000100000
Value after
Value after
Value after
Reset
Reset
Reset
0000
00
0h
0h
0h
0h
0
0
00
0h
0h
0
0