PCI9030-AA60BI PLX Technology, PCI9030-AA60BI Datasheet - Page 123

• Manufacturer Part Number: PCI9030-AA60BI
• Description: Peripheral Drivers & Components (PCIs) 32-bit 33MHz PCI v.2.2-compliant
• Manufacturer: PLX Technology

Specifications of PCI9030-AA60BI

• Package / Case: FPBGA-180
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Mounting Style: SMD/SMT
• Operating Supply Voltage: 3.3 V
• Lead Free Status / Rohs Status: No RoHS Version Available

PCI Configuration Registers
Register 10-14. (PCIBAR4; PCI:20h) PCI Base Address 4 for Accesses to Local Address Space 2
Note:
or disabled by setting or clearing LAS2BA[0].
Register 10-15. (PCIBAR5; PCI:24h) PCI Base Address 5 for Accesses to Local Address Space 3
Note:
or disabled by setting or clearing LAS3BA[0].
PCI 9030 Data Book Version 1.4
© 2002 PLX Technology, Inc. All rights reserved.
31:4
31:4
Bit
Bit
2:1
2:1
0
3
0
3
If allocated, Local Address Space 2 can be enabled
If allocated, Local Address Space 3 can be enabled
Memory Space Indicator. Writing 0 indicates the register maps into
Memory space. Writing 1 indicates the register maps into I/O space.
(Specified in the LAS2RR register.)
Register Location. Values:
00 = Locate anywhere in 32-bit Memory Address space
01 = PCI r2.1, Locate below 1-MB Memory Address space
10 = Locate anywhere in 64-bit Memory Address space
11 = Reserved
(Specified in the LAS2RR register.)
If I/O Space, bit 1 is always 0 and bit 2 is included in the base address.
Prefetchable (If Memory Space). Writing 1 indicates there are no side effects
on reads. Reflects value of LAS2RR[3] and provides only status to the system.
Does not affect PCI 9030 operation. The associated Bus Region Descriptor
register (LAS2BRD) controls prefetching functions of this address space.
(Specified in the LAS2RR register.)
If I/O Space, bit 3 is included in base address.
Memory Base Address. Memory base address for access to Local Address
Space 2.
Memory Space Indicator. Writing 0 indicates the register maps into
Memory space. Writing 1 indicates the register maps into I/O space.
(Specified in the LAS3RR register.)
Register Location. Values:
00 = Locate anywhere in 32-bit Memory Address space
01 = PCI r2.1, Locate below 1-MB Memory Address space
10 = Locate anywhere in 64-bit Memory Address space
11 = Reserved
(Specified in the LAS3RR register.)
If I/O Space, bit 1 is always 0 and bit 2 is included in the base address.
Prefetchable (If Memory Space). Writing 1 indicates there are no side effects
on reads. Reflects value of LAS3RR[3] and provides only status to the system.
Does not affect PCI 9030 operation. The associated Bus Region Descriptor
register (LAS3BRD) controls prefetching functions of this address space.
(Specified in the LAS3RR register.)
If I/O Space, bit 3 is included in base address.
Memory Base Address. Memory base address for access to Local Address
Space 3.
PCI r2.2, Reserved
PCI r2.2, Reserved
Description
Description
Read
Read
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Mem: No
Bit 2 Yes
Mem: No
Mem: No
Bit 2 Yes
Mem: No
Bit 1 No,
Bit 1 No,
I/O: Yes
I/O: Yes
Write
Write
Yes
Yes
I/O:
I/O:
No
No
Value after
Value after
Section 10
Reset
Reset
Registers
00
0h
00
0h
0
0
0
0
10-9