EP2AGX65DF29C6N Altera, EP2AGX65DF29C6N Datasheet - Page 88
EP2AGX65DF29C6N
Manufacturer Part Number
EP2AGX65DF29C6N
Description
IC ARRIA II GX FPGA 65K 780FBGA
Manufacturer
Altera
Series
Arria II GXr
Datasheets
1.EP2AGX45CU17C6N.pdf
(96 pages)
2.EP2AGX45CU17C6N.pdf
(14 pages)
3.EP2AGX45CU17C6N.pdf
(692 pages)
4.EP2AGX45CU17C6N.pdf
(10 pages)
5.EP2AGX45CU17C6N.pdf
(88 pages)
6.EP2AGX65DF29C6N.pdf
(306 pages)
Specifications of EP2AGX65DF29C6N
Number Of Logic Elements/cells
60214
Number Of Labs/clbs
2530
Total Ram Bits
5246
Number Of I /o
364
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
0°C ~ 85°C
Package / Case
780-FBGA
Family Name
Arria® II GX
Number Of Logic Blocks/elements
63250
# I/os (max)
364
Frequency (max)
400MHz
Operating Supply Voltage (typ)
900mV
Logic Cells
63250
Ram Bits
5557452.8
Operating Supply Voltage (min)
0.87V
Operating Supply Voltage (max)
0.93V
Operating Temp Range
0C to 85C
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
780
Package Type
FC-FBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Number Of Gates
-
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EP2AGX65DF29C6N
Manufacturer:
ST
Quantity:
12 000
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4–28
Rounding and Saturation Mode
Arria II GX Device Handbook, Volume 1
Round and saturation functions are often required in DSP arithmetic. Rounding is
used to limit bit growth and its side effects; saturation is used to reduce overflow and
underflow side effects.
Two rounding modes are supported in Arria II GX devices:
■
■
You must select one of the two options at compile time.
The round-to-nearest-integer provides the biased rounding support and is the
simplest form of rounding commonly used in DSP arithmetic. The
round-to-nearest-even mode provides unbiased rounding support and is used where
DC offsets are a concern.
mode. Examples of the difference between the two modes are shown in
this example, a 6-bit input is rounded to 4 bits. You can observe from
the main difference between the two rounding options is when the residue bits are
exactly half way between its nearest two integers and the LSB is zero (even).
Table 4–6. Example of Round-To-Nearest-Even Mode
Table 4–7. Comparison of Round-to-Nearest-Integer and Round-to-Nearest-Even
Round-to-nearest-integer mode
Round-to-nearest-even mode
6- to 4-bits
Rounding
010111
001101
001010
001110
110111
101101
110110
110010
Round-To-Nearest-Integer
010111
001101
001010
001110
110111
101101
110110
110010
➱
➱
➱
➱
➱
➱
➱
➱
Even (0010)
Even (1100)
Odd (0011)
Odd (1101)
Odd/Even
(Integer)
0110
0011
0011
0100
1110
1011
1110
1101
Table 4–6
×
×
×
×
lists an example of how round-to-nearest-even
Fractional
> 0.5 (11)
< 0.5 (01)
= 0.5 (10)
= 0.5 (10)
> 0.5 (11)
< 0.5 (01)
= 0.5 (10)
= 0.5 (10)
Chapter 4: DSP Blocks in Arria II GX Devices
Round-To-Nearest-Even
Add to Integer
010111
001101
001010
001110
110111
101101
110110
110010
1
0
0
1
1
0
1
0
© July 2010 Altera Corporation
Operational Mode Descriptions
➱
➱
➱
➱
➱
➱
➱
➱
0110
0011
0010
0100
1110
1011
1110
1100
Table 4–7
Table
Result
0110
0011
0010
0100
1110
1011
1110
1100
4–7. In
that
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