EP2AGX65DF29C6N Altera, EP2AGX65DF29C6N Datasheet - Page 46

• Manufacturer Part Number: EP2AGX65DF29C6N
• Description: IC ARRIA II GX FPGA 65K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX65DF29C6N

• Number Of Logic Elements/cells: 60214
• Number Of Labs/clbs: 2530
• Total Ram Bits: 5246
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 63250
• # I/os (max): 364
• Frequency (max): 400MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 63250
• Ram Bits: 5557452.8
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

3–6
Figure 3–5. Arria II GX Address Clock Enable during Write Cycle Waveform for M9K
Figure 3–6. Arria II GX Address Clock Enable during Write Cycle Waveform for MLAB
Arria II GX Device Handbook, Volume 1
latched address
(inside memory)
latched address
(inside memory)
contents at a0
contents at a1
contents at a2
contents at a3
contents at a4
contents at a5
contents at a0
contents at a1
contents at a2
contents at a3
contents at a4
contents at a5
addressstall
addressstall
wraddress
wraddress
Figure 3–5
Figure 3–6
MLAB.
inclock
inclock
wren
wren
data
data
an
an
XX
shows the address clock enable waveform during write cycle for M9K.
shows the address clock enable waveform during the write cycle for
XX
a0
00
a0
00
XX
a0
XX
a0
a1
01
a1
01
XX
01
XX
01
02
a2
02
a2
XX
XX
a1
XX
XX
a1
XX
XX
02
02
a3
03
a3
03
00
00
04
a4
Chapter 3: Memory Blocks in Arria II GX Devices
a4
04
a4
a4
03
03
© November 2009 Altera Corporation
a5
05
05
a5
04
04
a5
a5
05
05
a6
06
a6
06
Memory Features