EP2AGX65DF29C6N Altera, EP2AGX65DF29C6N Datasheet - Page 85

• Manufacturer Part Number: EP2AGX65DF29C6N
• Description: IC ARRIA II GX FPGA 65K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX65DF29C6N

• Number Of Logic Elements/cells: 60214
• Number Of Labs/clbs: 2530
• Total Ram Bits: 5246
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 63250
• # I/os (max): 364
• Frequency (max): 400MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 63250
• Ram Bits: 5557452.8
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

Chapter 4: DSP Blocks in Arria II GX Devices
Operational Mode Descriptions
Multiply Accumulate Mode
Figure 4–15. Multiply Accumulate Mode Shown for Half-DSP Block
Note to
(1) Block output for saturation overflow of chainout.
© July 2010
accum_sload
dataa_0[ ]
datab_0[ ]
dataa_1[ ]
datab_1[ ]
dataa_2[ ]
datab_2[ ]
dataa_3[ ]
datab_3[ ]
Figure
Altera Corporation
4–15:
Half-DSP Block
clock[3..0]
In multiply accumulate mode, the second-stage adder is configured as a 44-bit
accumulator or subtractor. The output of the DSP block is looped back to the
second-stage adder and added or subtracted with the two outputs of the first-stage
adder block according to
configured to operate in multiply accumulate mode.
A single DSP block can implement up to two independent 44-bit accumulators.
ena[3..0]
aclr[3..0]
+
+
output_saturate
output_round
Equation 4–3 on page
signa
signb
+
4–4.
Figure 4–15
chainout_sat_overflow (1)
Arria II GX Device Handbook, Volume 1
shows the DSP block
44
result[ ]
4–25