EP2AGX65DF29C6N Altera, EP2AGX65DF29C6N Datasheet - Page 146

• Manufacturer Part Number: EP2AGX65DF29C6N
• Description: IC ARRIA II GX FPGA 65K 780FBGA
• Manufacturer: Altera
• Series: Arria II GXr

Specifications of EP2AGX65DF29C6N

• Number Of Logic Elements/cells: 60214
• Number Of Labs/clbs: 2530
• Total Ram Bits: 5246
• Number Of I /o: 364
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: 0°C ~ 85°C
• Package / Case: 780-FBGA
• Family Name: Arria® II GX
• Number Of Logic Blocks/elements: 63250
• # I/os (max): 364
• Frequency (max): 400MHz
• Operating Supply Voltage (typ): 900mV
• Logic Cells: 63250
• Ram Bits: 5557452.8
• Operating Supply Voltage (min): 0.87V
• Operating Supply Voltage (max): 0.93V
• Operating Temp Range: 0C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 780
• Package Type: FC-FBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of Gates: -
• Lead Free Status / Rohs Status: Compliant

6–12
Arria II GX Device Handbook, Volume 1
Figure 6–3. Arria II GX On-Chip Series Termination without Calibration
To use OCT for:
■
■
On-Chip Series Termination with Calibration
Arria II GX devices support R
calibration circuit compares the total impedance of the I/O buffer to the external
25- ±1% or 50- ±1% resistors connected to the RUP and RDN pins, and dynamically
enables or disables the transistors until they match.
The R
occurs at the end of device configuration. When the calibration circuit finds the
correct impedance, it powers down and stops changing the characteristics of the
drivers.
Figure 6–4. Arria II GX On-Chip Series Termination with Calibration
SSTL Class I standard—select the 50-on-chip series termination setting, thus
eliminating the external 25- R
SSTL Class II standard—select the 25- on-chip series termination setting (to
match the 50- transmission line and the near-end external 50- pull-up to V
S
shown in
Figure 6–4
Series Termination
Series Termination
Arria II GX Driver
Arria II GX Driver
V
V
GND
GND
CCIO
CCIO
is the intrinsic impedance of transistors. Calibration
S
R
R
R
R
OCT with calibration in all banks. The R
S
S
S
S
S
(to match the 50- transmission line).
Z
Z
O
O
= 50 
= 50 
Chapter 6: I/O Features in Arria II GX Devices
Receiving
Receiving
Device
Device
© July 2010 Altera Corporation
Arria II GX OCT Support
S
OCT
TT
).