WG82574L S LBA9 Intel, WG82574L S LBA9 Datasheet - Page 56

• Manufacturer Part Number: WG82574L S LBA9
• Description: CONTROLLER, ENET, INTEL 82574L, 64PQFN
• Manufacturer: Intel

Specifications of WG82574L S LBA9

• Ethernet Type: IEEE 802.3, IEEE 802.3u, IEEE 802.3ab
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: 0°C To +85°C
• Digital Ic Case Style: QFN
• No. Of Pins: 64
• Package / Case: QFN
• Interface Type: I2C, JTAG, PCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 7.
3.3.6.1
Note:
3.3.6.2
56
NVM Shadow RAM
Flash Mode
The 82574L is initialized from the NVM. As part of the initialization sequence, the 82574
copies the 4 KB content of S0 or S1 from the Flash to the shadow RAM. Any access to
the EEPROM interface is directed to the shadow RAM. Following any write access to the
shadow RAM by software or firmware, the data should also be updated in the Flash. The
82574L maintains a watchdog timer defined by the FLASHT register to minimize Flash
updates. The timer is triggered by any write access to the shadow RAM. The 82574L
updates the Flash from the shadow RAM when the FLASHT timer expires or when
firmware or software request explicitly to update the Flash by setting the FLUPD bit in
the FLA register. The 82574L copies the content of the shadow RAM to the inactive
configuration sector and then makes it the active one. The Flash update sequence is
listed in the steps that follow:
Software should be aware of the fact that actual programming to the Flash might
require a long latency following the write access to the shadow RAM. Software might
poll the FLUDONE bit in the FLMNGCTL register to complete the Flash programming,
when required.
EEPROM Mode
When the 82574 is attached to an external EEPROM, any access to the EEPROM
interface is directed to the external EEPROM.
1. Initiates block erase instruction(s) to the inactive sector (the inactive sector is
2. Copy the shadow RAM to the inactive sector while the signature word is copied last.
3. Clear the signature word in the active sector to make it invalid.
4. Toggle the state of the SEC1VAL bit in the EEC register to indicate that the inactive
defined by the inverse value of the SEC1VAL bit in the EEC register).
sector became the active one and visa versa.
Address
Address
Address
8K
4K
00
LAN Flash
Sector 1
Sector 0
…
EEC.SELSHAD
Shadow RAM
82574 GbE Controller—Interconnects
EEPROM Interface
EEPROM
…