WG82574L S LBA9 Intel, WG82574L S LBA9 Datasheet - Page 355

• Manufacturer Part Number: WG82574L S LBA9
• Description: CONTROLLER, ENET, INTEL 82574L, 64PQFN
• Manufacturer: Intel

Specifications of WG82574L S LBA9

• Ethernet Type: IEEE 802.3, IEEE 802.3u, IEEE 802.3ab
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: 0°C To +85°C
• Digital Ic Case Style: QFN
• No. Of Pins: 64
• Package / Case: QFN
• Interface Type: I2C, JTAG, PCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Driver Programing Interface—82574 GbE Controller
10.2.7.11
10.2.7.12
10.2.7.13
This register only increments if transmits are enabled. The behavior of this counter is
slightly different in the 82574 relative to previous devices. For the 82574, this counter
does not increment for streaming transmits that are deferred due to TX IPG.
Transmit with No CRS - TNCRS (0x04034; R)
This register counts the number of successful packet transmissions in which the CRS
input from the PHY was not asserted within one slot time of start of transmission from
the MAC. Start of transmission is defined as the assertion of TX_EN to the PHY.
The PHY should assert CRS during every transmission. Failure to do so might indicate
that the link has failed, or the PHY has an incorrect link configuration. This register only
increments if transmits are enabled. This register is only valid when the 82574 is
operating at half duplex.
Carrier Extension Error Count - CEXTERR (0x0403C; R)
This register counts the number of packets received in which the carrier extension error
was signaled across the GMII interface. The PHY propagates carrier extension errors to
the MAC when an error is detected during the carrier extended time of a packet
reception. An extension error is signaled by the PHY by the encoding of 0x1F on the
receive data inputs while RX_ER is asserted to the MAC. This register only increments if
receives are enabled and the device is operating at 1000 Mb/s.
Receive Length Error Count - RLEC (0x04040; R)
This register counts receive length error events. A length error occurs if an incoming
packet passes the filter criteria but is undersized or oversized. Packets less than 64
bytes are undersized. Packets over 1522 bytes are oversized if LongPacketEnable is 0b.
If LongPacketEnable (LPE) is 1b, then an incoming, packet is considered oversized if it
exceeds 16384 bytes.
If receives are not enabled, this register does not increment. These lengths are based
on bytes in the received packet from <Destination Address> through <CRC>,
inclusively.
TNCRS
CEXTERR
RLEC
Field
Field
Field
31:0
31:0
31:0
Bit(s)
Bit(s)
Bit(s)
0x0
0x0
0x0
Initial
Initial
Initial
Value
Value
Value
Number of transmissions without a CRS assertion from the PHY.
Number of packets received with a carrier extension error.
Number of packets with receive length errors.
Description
Description
Description
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