WG82574L S LBA9 Intel, WG82574L S LBA9 Datasheet - Page 289

• Manufacturer Part Number: WG82574L S LBA9
• Description: CONTROLLER, ENET, INTEL 82574L, 64PQFN
• Manufacturer: Intel

Specifications of WG82574L S LBA9

• Ethernet Type: IEEE 802.3, IEEE 802.3u, IEEE 802.3ab
• Supply Voltage Range: 3V To 3.6V
• Operating Temperature Range: 0°C To +85°C
• Digital Ic Case Style: QFN
• No. Of Pins: 64
• Package / Case: QFN
• Interface Type: I2C, JTAG, PCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Driver Programing Interface—82574 GbE Controller
Receive
Receive
Receive
Receive
Receive
Receive
Receive
Receive
Receive
Receive
Receive
Transmit
Transmit
Transmit
Transmit
Transmit
Transmit
Transmit
Transmit
Transmit
Transmit
Transmit
Transmit
Statistic
Statistic
Statistic
Statistic
Statistic
Statistic
Statistic
Statistic
Statistic
Statistic
Statistic
Statistic
Category
0x00400
0x00410
0x00458
0x03800
0x03808
0x03818
0x03820
0x0382C
0x05400
0x05404
0x05408
0x0540C
0x05600-
0x057FC
0x05600-
0x057FC
0x05478
0x0547C
0x05818
0x05C00-
0x05C7F
0x05C80-
0x05CA7
0x03804
0x03810
0x03840
0x03828
0x04000
0x04004
0x0400C
0x04010
0x04014
0x04018
0x0401C
0x04020
0x04028
0x04030
0x04034
0x0403C
Offset
0x00040
0x00044
0x00048
0x0004C
0x00600-
0x007FC
0x00600-
0x006FC
0x000B8
N/A
N/A
N/A
N/A
N/A
N/A
0x00420
0x00424
0x00428
0x00430
0x00438
N/A
0x00440
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
x000BC
Offset
Alias
RAL(0)
RAH(0)
RAL(1)
RAH(1)
VFTA[127:0]
RAL(15)
RAH(15)
RETA
TADV
RSSRK
VFTA[127:0]
MRQC
TCTL
TIPG
AIT
TDBAL
TDBAH
TDLEN
TDH
TDT
TARC
TIDV
TXDCTL
CRCERRS
ALGNERRC
RXERRC
MPC
SCC
ECOL
MCC
LATECOL
COLC
DC
TNCRS
CEXTERR
Abbreviation
Receive Address Low (0)
Receive Address High (0)
Receive Address Low (1)
Receive Address High (1)
VLAN Filter Table Array
VLAN Filter Table Array (n)
Receive Address Low (15)
Receive Address High (15)
Multiple Receive Queues Command
register
Redirection Table
RSS Random Key Register
Transmit Control Register
Transmit IPG Register
Adaptive IFS Throttle
Transmit Descriptor Base Address Low
Transmit Descriptor Base Address High
Transmit Descriptor Length
Transmit Descriptor Head
Transmit Descriptor Tail
Transmit Arbitration Count
Transmit Interrupt Delay Value
Transmit Descriptor Control
Transmit Absolute Interrupt Delay Value
CRC Error Count
Alignment Error Count
RX Error Count
Missed Packets Count
Single Collision Count
Excessive Collisions Count
Multiple Collision Count
Late Collisions Count
Collision Count
Defer Count
Transmit with No CRS
Carrier Extension Error Count
Name
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
R
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
R
R
R
R
R
R
R
R
R
R
R
RW
page 340
page 340
page 340
page 340
page 341
page 341
page 340
page 340
page 342
page 342
page 343
page 344
page 345
page 346
page 346
page 347
page 347
page 347
page 348
page 348
page 349
page 350
page 351
page 352
page 352
page 353
page 353
page 353
page 353
page 354
page 354
page 354
page 354
page 355
page 355
Link to
Page
289