DS34S132GNA2+ Maxim Integrated, DS34S132GNA2+ Datasheet - Page 55

• Manufacturer Part Number: DS34S132GNA2+
• Description: Communication ICs - Various 32Port TDM-Over-Pack Transport Device
• Manufacturer: Maxim Integrated

Specifications of DS34S132GNA2+

• Rohs: yes
• Part # Aliases: 90-34S13+2N2

Figure 9-22. Ethernet Port BERT Diagram
The Full Channel (Roundtrip) Test requires a loopback at the far end (on the right side of the diagram). The S132
Packet BERT Pattern Generator sends a BERT Pattern to the S132 Transmit Ethernet Port. The BERT Monitor
verifies that the data returned at the Receive Ethernet Port is error free.
The Half Channel (one-way) Test requires an equivalent BERT Tester at the far end (on the right side of the
diagram). The S132 Packet BERT Pattern Generator sends a BERT Pattern to the S132 Transmit Ethernet Port.
The far end must use a BERT Pattern Monitor to verify that the data is received error free. Similarly, the far end can
transmit a BERT Pattern in the opposite direction. The S132 BERT Monitor can be used to verify that the data is
received error free.
The Packet BERT Engine can be enabled at the same time as the TDM BERT. The two BERT Engines share
several register settings, so the TDM and Packet BERT tests are not independent of each other. For Half Channel
Packet BERT Testing the Generator and Monitor must be programmed to match what is expected at the far end
(right side of
Testing. The connections that are external to the S132 determine the Full vs. Half Channel application.
The S132 Packet BERT Engine uses an Encap BERT Generator and a Decap BERT Monitor. The
MD.EBCR.ETBE
the generated BERT Test Pattern is to be inserted into. The BERT Test Pattern is placed in the Payload section. If
a Bundle that is programmed to support sub-channel CAS Signaling is assigned to a Packet BERT Test, the sub-
channel CAS Signaling is unaffected (not tested) by the BERT Test. The
Packet BERT Monitor and
The Packet BERT Engine supports 3 Test Pattern Types: Pseudo-Random Bit Sequence (PRBS), Quasi-Random
Bit Sequence (QRSS) and Repetitive Patterns. The Packet BERT Generator Test Pattern Type is programmed
using
DB.BPCR.PTS
For the Pseudo-Random pattern, the “z” coefficient, “y” coefficient and Seed for the X + X
selected for the Generator using EB.BPCR.PTF,
DB.BPCR.PTF,
For the Quasi-Random pattern the PTF,
used. The Quasi-Random pattern is similar to a PRBS pattern but with the number of “consecutive zeros" in the
pattern limited to 14.
For the Repetitive pattern, the pattern length and pattern value are selected for the Generator using
and EB.BPCR.BPS; and for the Monitor using
The
generation of the test pattern) and Test Pattern Inversion (TPIC).
19-4750; Rev 1; 07/11
Framer/
T1/E1
EB.BCR
LIU
EB.BPCR.PTS
Figure
register is used to program the Packet BERT Generator for New Test Pattern Load (TNPL; initiate
and DB.BPCR.QRSS.
DB.BPCR.PLF
enable/disables the Packet BERT Generator and
9-22). There is no register setting to program the BERT Test Engine to “Full” or “Half” Channel
and EB.BPCR.QRSS. The Packet BERT Monitor Test Pattern Type is programmed using
X
MD.DBCR.DRBBS
S132
Encap BERT
Decap BERT
TXP Packet
RXP Packet
Generator
Monitor
and DB.BPCR.BPS.
PLF
and
selects the RXP Bundle that is to be monitored.
DB.BPCR.PLF
Ethernet
BPS
Phy
EB.BPCR.PLF
registers are ignored and the X
and DB.BPCR.BPS. The
PSN
and EB.BPCR.BPS; and for the Monitor using
MD.EBCR.ETBBS
MD.DBCR.DRBE
selects the TXP Bundle that
PTF
20
DS34S132 DATA SHEET
+ X
Remote Ethernet
Remote Ethernet
settings are ignored.
Monitor
Pattern
BERT
BERT
17
y
+1 PRBS pattern is
+1 QRBS pattern is
enable/disables the
Full Channel
Device
Device
Roundtrip
EB.BPCR.PLF
(1-way)
BERT
BERT
Chan
55 of 194
Half