DS34S132GNA2+ Maxim Integrated, DS34S132GNA2+ Datasheet - Page 34

• Manufacturer Part Number: DS34S132GNA2+
• Description: Communication ICs - Various 32Port TDM-Over-Pack Transport Device
• Manufacturer: Maxim Integrated

Specifications of DS34S132GNA2+

• Rohs: yes
• Part # Aliases: 90-34S13+2N2

of the Sequence Number. Both Timestamp types provide a measure of time, one referenced to a common clock,
the other referenced to the receive TDM Port line rate.
In the TXP direction the S132 supports all 3 techniques. The ACR technique is implicit in the packet transmit rate.
The DCR-DT and AT techniques are supported by transmitting Differential or Absolute Timestamps (respectively).
In the RXP direction the S132 directly supports the ACR and DCR-DT techniques. With the ACR technique the
Clock Recovery Engine recovers timing from the rate at which packets are received. With DCR-DT the Clock
Recovery Engine recovers timing from the received RTP Differential Timestamps.
In the RXP direction the S132 is compatible with (supports) the AT technique, but does not utilize the RTP Absolute
Timestamps. To provide compatibility with the AT technique the Clock Recovery Engine instead recovers timing
using the ACR technique (derived from the rate at which packets are received).
9.2.1.1.1
There are 32 RXP Clock Recovery Engines, one hardwired to each of the 32 TDM Ports. Each can be programmed
to support the ACR or DCR-DT technique.
Figure 9-8. Clock Recovery Engine Environment
When a Transmit TDM Port is programmed to derive its timing from a Clock Recovery Engine, one TDMoP
PW/Bundle must be programmed to include an RXP PW-Timing Connection (B.BCDR4.PCRE). No more than one
PW/Bundle can be assigned to provide the RXP PW-Timing Connection for a TDM Port.
The RXP Clock Recovery technique (ACR or DCR-DT) is selected by properly programming the S132 Clock
Recovery Engine DSP firmware revision (not included in this Datasheet).
9.2.1.1.2
In the TXP direction the TDMoP PWs communicate timing information through the transmission rate of the TXP
Packets (ACR) and can optionally include an RTP Timestamp with each TXP Packet. TXP Packets are
automatically transmitted when sufficient T1/E1 data has been received to fill the TXP Packet payload. A TXP PW-
Timing Connection is only required if a TXP RTP Timestamp is included in the TXP packets.
The S132 appends a header to the payload of each TXP TDMoP Packet as it is transmitted. The header is
programmed using a TXP Header Descriptor that is stored in a block of memory at
Header Descriptor per Bundle). A TXP PW-Timing Connection is enabled when the TXP Header Descriptor for a
Bundle is programmed to insert a TXP RTP Timestamp (TXRE field = 1; see “TXP SAT/CES and HDLC PW Packet
Generation” section). Any number of TXP Bundles can be programmed to include an RTP Header.
Figure 9-9. TXP PW-Timing Environment
In the TXP direction, to conform to the Clock Recovery technique that is used at the far end PW end point, the
S132 allows the RTP Header to be optionally enabled with a Differential Timestamp or Absolute Timestamp,
independent of the RXP RTP settings.
inserted when the RTP Header has been enabled in the TXP Header Descriptor.
RTP Differential Timestamp values are generated using the
in the Pn.PRCR4.TSGMC,
When the RTP Absolute Timestamp is enabled, the Absolute Timestamp values are incremented according to the
receive TDM Port timing
19-4750; Rev 1; 07/11
DS34S132
DS34S132
Xmt Port
Rcv Port
TDM
TDM
RXP Clock Recovery (RXP PW-Timing)
TXP PW-Timing
Xmt TDM Timing
Rcv TDM Timing
(Pn.PRCR2.RSS
Pn.PRCR5.TSGN1C
RXP SAT/CES Engine Timing
TXP SAT/CES Engine Timing
RTP Timestamp Generator
Clock Recovery Engines
Pn.PRCR4.TSGMS
selects the receive TDM Port timing as either
and
Pn.PRCR5.TSGN0C
selects whether Differential or Absolute Timestamps are
CMNCLK
input and 3 coefficients that are programmed
TXP Timing
RXP Timing
registers (programmed per TDM Port).
Generator
Classifier
RXP Pkt
TXP Pkt
EMI.BMCR1.TXHSO
RCLKn
DS34S132 DATA SHEET
or TCLKOn).
34 of 194
(1 TXP