DS34S132GNA2+ Maxim Integrated, DS34S132GNA2+ Datasheet - Page 101
DS34S132GNA2+
Manufacturer Part Number
DS34S132GNA2+
Description
Communication ICs - Various 32Port TDM-Over-Pack Transport Device
Manufacturer
Maxim Integrated
Datasheet
1.DS34S132GNA2.pdf
(194 pages)
Specifications of DS34S132GNA2+
Rohs
yes
Part # Aliases
90-34S13+2N2
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19-4750; Rev 1; 07/11
B. Field
Name
CWCDIE
[7:0]
G1SRIE.
RSVD
CWCDIE
[15:8]
G2SRIE.
RSVD
CWCDIE
[23:16]
G3SRIE.
RSVD
CWCDIE
[31:24]
G4SRIE.
RSVD
CWCDIE
[39:32]
G5SRIE.
RSVD
CWCDIE
[47:40]
G6SRIE.
RSVD
CWCDIE
[55:48]
G7SRIE.
RSVD
CWCDIE
[63:56]
G8SRIE.
RSVD
CWCDIE
[71:64]
G9SRIE.
RSVD
CWCDIE
[79:72]
G10SRIE. A:01A8h
RSVD
CWCDIE
[87:80]
G11SRIE. A:01ACh
RSVD
Addr (A:)
Bit [x:y]
A:0184h
A:0188h
A:018Ch
A:0190h
A:0194h
A:0198h
A:019Ch
A:01A0h
A:01A4h
[31:8]
[31:8]
[31:8]
[31:8]
[31:8]
[31:8]
[31:8]
[31:8]
[31:8]
[31:8]
[31:8]
[7:0] rwc-_-i3
[7:0] rwc-_-i3
[7:0] rwc-_-i3
[7:0] rwc-_-i3
[7:0] rwc-_-i3
[7:0] rwc-_-i3
[7:0] rwc-_-i3
[7:0] rwc-_-i3
[7:0] rwc-_-i3
[7:0] rwc-_-i3
[7:0] rwc-_-i3
Type
Description
Control Word Change Detect Interrupt Enable. For z = 0 to 7, the combination
of B.G0SRL[z] = 1 and B.G0SRIE[z] = 1, forces G.GSR5[0] = 1.
Group 1 Status Register Interrupt Enable. Default: 0x00.00.00.00
Reserved.
Control Word Change Detect Interrupt Enable. For z = 0 to 7, the combination
of B.G1SRL[z] = 1 and B.G1SRIE[z] = 1, forces G.GSR5[1] = 1.
Group 2 Status Register Interrupt Enable. Default: 0x00.00.00.00
Reserved.
Control Word Change Detect Interrupt Enable. For z = 0 to 7, the combination
of B.G2SRL[z] = 1 and B.G2SRIE[z] = 1, forces G.GSR5[2] = 1.
Group 3 Status Register Interrupt Enable. Default: 0x00.00.00.00
Reserved.
Control Word Change Detect Interrupt Enable. For z = 0 to 7, the combination
of B.G3SRL[z] = 1 and B.G3SRIE[z] = 1, forces G.GSR5[3] = 1.
Group 4 Status Register Interrupt Enable. Default: 0x00.00.00.00
Reserved.
Control Word Change Detect Interrupt Enable. For z = 0 to 7, the combination
of B.G4SRL[z] = 1 and B.G4SRIE[z] = 1, forces G.GSR5[4] = 1.
Group 5 Status Register Interrupt Enable. Default: 0x00.00.00.00
Reserved.
Control Word Change Detect Interrupt Enable. For z = 0 to 7, the combination
of B.G5SRL[z] = 1 and B.G5SRIE[z] = 1, forces G.GSR5[5] = 1.
Group 6 Status Register Interrupt Enable. Default: 0x00.00.00.00
Reserved.
Control Word Change Detect Interrupt Enable. For z = 0 to 7, the combination
of B.G6SRL[z] = 1 and B.G6SRIE[z] = 1, forces G.GSR5[6] = 1.
Group 7 Status Register Interrupt Enable. Default: 0x00.00.00.00
Reserved.
Control Word Change Detect Interrupt Enable. For z = 0 to 7, the combination
of B.G7SRL[z] = 1 and B.G7SRIE[z] = 1, forces G.GSR5[7] = 1.
Group 8 Status Register Interrupt Enable. Default: 0x00.00.00.00
Reserved.
Control Word Change Detect Interrupt Enable. For z = 0 to 7, the combination
of B.G8SRL[z] = 1 and B.G8SRIE[z] = 1, forces G.GSR5[8] = 1.
Group 9 Status Register Interrupt Enable. Default: 0x00.00.00.00
Reserved.
Control Word Change Detect Interrupt Enable. For z = 0 to 7, the combination
of B.G9SRL[z] = 1 and B.G9SRIE[z] = 1, forces G.GSR5[9] = 1.
Group 10 Status Register Interrupt Enable. Default: 0x00.00.00.00
Reserved.
Control Word Change Detect Interrupt Enable. For z = 0 to 7, the combination
of B.G10SRL[z] = 1 and B.G10SRIE[z] = 1, forces G.GSR5[10] = 1.
Group 11 Status Register Interrupt Enable. Default: 0x00.00.00.00
Reserved.
DS34S132 DATA SHEET
101 of 194
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