DS34S132GNA2+ Maxim Integrated, DS34S132GNA2+ Datasheet - Page 54
DS34S132GNA2+
Manufacturer Part Number
DS34S132GNA2+
Description
Communication ICs - Various 32Port TDM-Over-Pack Transport Device
Manufacturer
Maxim Integrated
Datasheet
1.DS34S132GNA2.pdf
(194 pages)
Specifications of DS34S132GNA2+
Rohs
yes
Part # Aliases
90-34S13+2N2
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(G.GCR.EC25
time (as long as the
M.NET_CONTROL.TXP_HALT, START_TXP,
data at the Ethernet MAC/Port.
The MAC must be programmed to operate in the Full-duplex mode
M.NET_CONFIG.FULL_DUPLEX
can adversely affect the delay/latency of the PW packets.
The standard maximum Ethernet Frame size is 1518 bytes. The MAC can be programmed to accept RXP Ethernet
frames with byte lengths of 1518 bytes or 1536 bytes using
using M.NET_CONFIG.JUMBO_FRMS.
The MAC can be programmed to accept or discard all non-VLAN frames using M.NET_CONFIG.DISC_NOVLAN.
The MAC, when programmed as prescribed in the “Register Guide”, “Global Ethernet MAC” section, checks each
received RXP packet for valid Ethernet preamble, FCS, alignment and length. Packets with errors are discarded. In
the TXP direction the MAC appends an Ethernet FCS and adds padding to packets that are < 64-bytes in length.
The MDIO interface can be enabled using M.MAN_PORT_EN, and programmed using the
M.NET_STATUS
MDC
be set such that
SYSCLK
9.3.1.1
The S132 supports Ethernet Loopback and Packet BERT Functions for diagnostic testing of the Ethernet Port.
9.3.1.1.1
The
data back in the RXP direction. CES, SAT, HDLC and Clock data/information that is received at a TDM Port is
encapsulated into TXP packets using the programmed Bundle settings. TXP packets that are initiated by the CPU
are also encapsulated into TXP CPU Packets. The combination of all TXP packet types is looped back in the RXP
direction. The RXP packets are forwarded according to the programmed RXP Bundle settings (forwarded to the
TDM Ports and/or CPU). No data is transmitted toward the Ethernet Phy and no data is received from the Ethernet
Phy while the Ethernet loopback is active. This loopback is depicted in
loopback of TXP CPU packets to the CPU is not depicted).
Figure 9-21. Ethernet Port Local Loopback
9.3.1.1.2
An Ethernet path can be tested using a BERT Test Pattern. The S132 supports “Full Channel” and “Half Channel”
Packet BERT Testing. Only one Packet BERT Test can be enabled on an S132 device at a time. The “Full
Channel” and “Half Channel” BERT Tests are depicted in
19-4750; Rev 1; 07/11
M.NET_CONTROL.LB_LOCAL
(MDIO Clock) is divided down from the
= 50 MHz and
Ethernet Port Diagnostic Functions
Ethernet Loopback
Packet BERT
Framer/LIU
= 0). In some cases
T1/E1
MDC
registers.
RXCLK
frequency =
MDC_CLK_DIV
output from the Phy is a constant, non-gapped 125 MHz signal).
= 1). The Half-duplex mode and Pause Control are not supported because they
ETHCLK
SYSCLK
= 1 enables the Ethernet Port Loopback that sends all receive TXP packet
= 010b (selects divide by 32), then the
SYSCLK
can be tied to
÷ (selected
TXP_EN
S132
input.
and
Figure
MDC_CLK_DIV
RXCLK
M.NET_CONFIG.RXP_1536FRMS
MDC_CLK_DIV
RXP_EN
9-22.
to have the Phy device drive both inputs at one
(M.NET_CONFIG.EN_FRMS_UDUP
X
X
enable/disable the flow of RXP and TXP
Figure 9-21
divider value) ≤ 2.5 MHz. For example if
sets the “divided by” value and should
MDC
frequency will be 1.56 MHz.
using a T1/E1 example (the
DS34S132 DATA SHEET
Ethernet
Phy
or up to 2000 bytes
M.PHY_MAN
54 of 194
= 0 and
and
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