ST92F120V1Q7 STMicroelectronics, ST92F120V1Q7 Datasheet - Page 162

Microcontrollers (MCU) Flash 128K SPI/I2C

ST92F120V1Q7

Manufacturer Part Number
ST92F120V1Q7
Description
Microcontrollers (MCU) Flash 128K SPI/I2C
Manufacturer
STMicroelectronics
Datasheet

Specifications of ST92F120V1Q7

Data Bus Width
8 bit, 16 bit
Program Memory Type
Flash
Program Memory Size
128 KB
Data Ram Size
4 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
24 MHz
Number Of Programmable I/os
77
Number Of Timers
5
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Package / Case
PQFP-100
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit, 16 Channel
Lead Free Status / Rohs Status
No

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MULTIFUNCTION TIMER (MFT)
MULTIFUNCTION TIMER (Cont’d)
10.4.3.9 TxINA = Clock Up - TxINB = Clock
Down
The edge received on input pin A (or B) performs a
one step up (or down) count, so that the counter
clock and the up/down control are external. Setting
the UDC bit in the TCR register has no effect in
this configuration, and input pin B has priority on
input pin A.
10.4.3.10 TxINA = Up/Down - TxINB = Ext Clock
An High (or Low) level applied to input pin A sets
the counter in the up (or down) count mode, while
the signal applied to input pin B is used as clock for
the prescaler. Setting the UDC bit in the TCR reg-
ister has no effect in this configuration.
162/324
9
10.4.3.11 TxINA = Trigger Up - TxINB = Trigger
Down
Up/down control is performed through both input
pins A and B. A edge on input pin A sets the up
count mode, while a edge on input pin B (which
has priority on input pin A) sets the down count
mode. The counter clock is internally generated,
and setting the UDC bit in the TCR register has no
effect in this configuration.
10.4.3.12 TxINA = Up/Down - TxINB = I/O
An High (or Low) level of the signal applied on in-
put pin A sets the counter in the up (or down) count
mode. The counter clock is internally generated.
Setting the UDC bit in the TCR register has no ef-
fect in this configuration.

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