FX1S-30MR-ES/UL MITSUBISHI, FX1S-30MR-ES/UL Datasheet - Page 149

PLC, 16 IN, 14 RELAY OUT, 110V/2

FX1S-30MR-ES/UL

Manufacturer Part Number
FX1S-30MR-ES/UL
Description
PLC, 16 IN, 14 RELAY OUT, 110V/2
Manufacturer
MITSUBISHI
Datasheet

Specifications of FX1S-30MR-ES/UL

No. Of Analogue Inputs
16
No. Of Analogue Outputs
14
Ip/nema Rating
IP10
Approval Bodies
CE, CUL, UL
External Depth
49mm
External Length / Height
90mm
External Width
60mm
Mounting Type
Panel
5.3.3
FX Series Programmable Controlers
Viewing 64 bit numbers
• It is currently impossible to monitor the contents of a 64 bit result. However, the result can
MUL (FNC 22)
Points to note:
a) When operating the MUL instruction in 16bit mode, two 16 bit data sources are multiplied
b) When operating the MUL instruction in 32 bit mode, two 32 bit data sources are multiplied
c) If the location of the destination device is smaller than the obtained result, then only the
MUL
FNC 22
(Multiplica
-tion)
Mnemonic
be monitored in two smaller,32 bit, blocks, i.e. a 64 bit result is made up of the following
parts: (upper 32 bits)
together. They produce a 32 bit result. The device identified as the destination address is
the lower of the two devices used to store the 32 bit result. Using the above example with
some test data:
5 (D0)
together. They produce a 64 bit result. The device identified as the destination address is
the lower of the four devices used to store the 64 bit result.
portion of the result which directly maps to the destination area will be written, i.e if a result
of 72 (decimal) is to be stored at K1Y4 then only Y7 would be active. In binary terms this is
equivalent to a decimal value of 8, a long way short of the real result of 72!
X0
7 (D2) = 35 - The value 35 is stored in (D4, D5) as a single 32 bit word.
MUL
Multiplies the two
source devices
together the result
is stored in the
destination device
Function
[ S1 ]
D 0
[ S2 ]
D 2
2
32
[ D ]
D 4
+ (lower 32 bits).
K, H, KnX, KnY, KnM, KnS,
T, C, D, V, Z
See page 4-46 for more
details regarding floating
point format.
When using M8023 to subtract floating point
data, only double word (32 bit) data registers
(D) or constants (K/H) may be used.
S1
Operation : (Applicable to all units)
The contents of the two source devices (S1, S2)
are multiplied together and the result is stored at
the destination device (D). Note the normal rules of
algebra apply.
Operands
S2
KnY,KnM,KnS,
T, C, D, Z(V)
Note: Z(V) may
NOT be used
for 32 bit oper-
ation
D
Applied Instructions 5
MUL, MULP:
7steps
DMUL,
DMULP:
13 steps
Program steps
5-27

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