DK-DEV-1AGX60N Altera, DK-DEV-1AGX60N Datasheet - Page 80

• Manufacturer Part Number: DK-DEV-1AGX60N
• Description: KIT DEV ARRIA GX 1AGX60N
• Manufacturer: Altera
• Series: Arria GXr
• Type: FPGAr

Specifications of DK-DEV-1AGX60N

• Contents: Dev. Board, Quartus® II Web Edition, Reference Designs, Labs, and Complete Documentation
• For Use With/related Products: 1AGX60N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2372

2–74
Figure 2–62. Global and Regional Clock Connections from Center Clock Pins and Fast PLL Outputs
Note to
(1) The global or regional clocks in a fast PLL's quadrant can drive the fast PLL input. A dedicated clock input pin or other PLL must drive the global
Arria GX Device Handbook, Volume 1
or regional source. The source cannot be driven by internally generated logic before driving the fast PLL.
Figure
2–62:
CLK0
CLK1
CLK2
CLK3
PLL 1
PLL 2
Fast
Fast
C0
C1
C2
C3
C0
C1
C2
C3
RCLK0
RCLK1
RCLK2
RCLK3
RCLK4
RCLK5
RCLK6
RCLK7
GCLK0
GCLK1
GCLK2
GCLK3
© December 2009 Altera Corporation
Chapter 2: Arria GX Architecture
(Note 1)
Logic Array
Signal Input
PLLs and Clock Networks
To Clock
Network