DK-DEV-1AGX60N Altera, DK-DEV-1AGX60N Datasheet - Page 54

• Manufacturer Part Number: DK-DEV-1AGX60N
• Description: KIT DEV ARRIA GX 1AGX60N
• Manufacturer: Altera
• Series: Arria GXr
• Type: FPGAr

Specifications of DK-DEV-1AGX60N

• Contents: Dev. Board, Quartus® II Web Edition, Reference Designs, Labs, and Complete Documentation
• For Use With/related Products: 1AGX60N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2372

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Table 2–10. Arria GX Device Routing Scheme
TriMatrix Memory
Table 2–11. TriMatrix Memory Features (Part 1 of 2)
Arria GX Device Handbook, Volume 1
Shared arithmetic chain
Carry chain
Register chain
Local interconnect
Direct link interconnect
R4 interconnect
R24 interconnect
C4 interconnect
C16 interconnect
ALM
M512 RAM block
M4K RAM block
M-RAM block
DSP blocks
Column IOE
Row IOE
Maximum performance
True dual-port memory
Simple dual-port memory
Single-port memory
Shift register
Source
Memory Feature
Table 2–10
TriMatrix memory consists of three types of RAM blocks: M512, M4K, and M-RAM.
Although these memory blocks are different, they can all implement various types of
memory with or without parity, including true dual-port, simple dual-port, and
single-port RAM, ROM, and FIFO buffers.
different RAM blocks.
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lists the routing scheme for Arria GX device.
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M512 RAM Block
(32 × 18 Bits)
345 MHz
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Destination
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Table 2–11
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M4K RAM Block
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(128 × 36 Bits)
380 MHz
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lists the size and features of the
© December 2009 Altera Corporation
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Chapter 2: Arria GX Architecture
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(4K × 144 Bits)
M-RAM Block
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290 MHz
TriMatrix Memory
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