DK-DEV-1AGX60N Altera, DK-DEV-1AGX60N Datasheet - Page 35

• Manufacturer Part Number: DK-DEV-1AGX60N
• Description: KIT DEV ARRIA GX 1AGX60N
• Manufacturer: Altera
• Series: Arria GXr
• Type: FPGAr

Specifications of DK-DEV-1AGX60N

• Contents: Dev. Board, Quartus® II Web Edition, Reference Designs, Labs, and Complete Documentation
• For Use With/related Products: 1AGX60N
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: 544-2372

Chapter 2: Arria GX Architecture
Logic Array Blocks
Figure 2–25. Arria GX LAB Structure
LAB Interconnects
© December 2009 Altera Corporation
Direct link
interconnect from
adjacent block
Direct link
interconnect to
adjacent block
The LAB local interconnect can drive all eight ALMs in the same LAB. It is driven by
column and row interconnects and ALM outputs in the same LAB. Neighboring
LABs, M512 RAM blocks, M4K RAM blocks, M-RAM blocks, or digital signal
processing (DSP) blocks from the left and right can also drive the local interconnect of
a LAB through the direct link connection. The direct link connection feature
minimizes the use of row and column interconnects, providing higher performance
and flexibility. Each ALM can drive 24 ALMs through fast local and direct link
interconnects.
Local Interconnect
LAB
from Either Side by Columns & LABs,
Local Interconnect is Driven
& from Above by Rows
Row Interconnects of
Variable Speed & Length
ALMs
Arria GX Device Handbook, Volume 1
Column Interconnects of
Variable Speed & Length
Direct link
interconnect from
adjacent block
Direct link
interconnect to
adjacent block
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