HD6413008F RENESAS [Renesas Technology Corp], HD6413008F Datasheet - Page 81

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HD6413008F

Manufacturer Part Number
HD6413008F
Description
Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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Table 2.9
Instruction Size*
TRAPA
RTE
SLEEP
LDC
STC
ANDC
ORC
XORC
NOP
Note:
* Size refers to the operand size.
B: Byte
W: Word
B/W
B/W
B
B
B
System Control Instructions
Function
Starts trap-instruction exception handling
Returns from an exception-handling routine
Causes a transition to the power-down state
(EAs) → CCR
Moves the source operand contents to the condition code register. The
condition code register size is one byte, but in transfer from memory, data is
read by word access.
CCR → (EAd)
Transfers the CCR contents to a destination location. The condition code
register size is one byte, but in transfer to memory, data is written by word
access.
CCR ∧ #IMM → CCR
Logically ANDs the condition code register with immediate data.
CCR ∨ #IMM → CCR
Logically ORs the condition code register with immediate data.
CCR ⊕ #IMM → CCR
Logically exclusive-ORs the condition code register with immediate data.
PC + 2 → PC
Only increments the program counter.
Rev.4.00 Aug. 20, 2007 Page 37 of 638
REJ09B0395-0400
2. CPU

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