HD6413008F RENESAS [Renesas Technology Corp], HD6413008F Datasheet - Page 262

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HD6413008F

Manufacturer Part Number
HD6413008F
Description
Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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8. 16-Bit Timer
Example of Synchronization: Figure 8.25 shows an example of synchronization. Channels 0, 1,
and 2 are synchronized, and are set to operate in PWM mode. Channel 0 is set for counter clearing
by compare match with GRB0. Channels 1 and 2 are set for synchronous counter clearing. The
timer counters in channels 0, 1, and 2 are synchronously preset, and are synchronously cleared by
compare match with GRB0. A three-phase PWM waveform is output from pins TIOCA
and TIOCA
Rev.4.00 Aug. 20, 2007 Page 218 of 638
REJ09B0395-0400
1.
2.
3.
4.
5.
Set the SYNC bits to 1 in TSNC for the channels to be synchronized.
When a value is written in 16TCNT in one of the synchronized channels, the same value is
simultaneously written in 16TCNT in the other channels.
Set the CCLR1 or CCLR0 bit in 16TCR to have the counter cleared by compare match or input capture.
Set the CCLR1 and CCLR0 bits in 16TCR to have the counter cleared synchronously.
Set the STR bits in TSTR to 1 to start the synchronized counters.
Setup for synchronization
Select synchronization
Synchronous preset
Synchronous preset
Write to 16TCNT
2
. For further information on PWM mode, see section 8.4.4, PWM Mode.
Figure 8.24 Setup Procedure for Synchronization (Example)
1
2
Select counter clear source
synchronized to this
Synchronous clear
Counter clear
Start counter
Clearing
channel?
Yes
3
5
No
Select counter clear source
Synchronous clear
Start counter
0
, TIOCA
4
5
1
,

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