HD6413008F RENESAS [Renesas Technology Corp], HD6413008F Datasheet - Page 356

• Manufacturer Part Number: HD6413008F
• Description: Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
• Manufacturer: RENESAS [Renesas Technology Corp]

11. Watchdog Timer
11.2.2
TCSR is an 8-bit readable and writable register. Its functions include selecting the timer mode and
clock source.
Notes: The method for writing to TCSR is different from that for general registers to prevent
Bits 7 to 5 are initialized to 0 by a reset and in standby mode. Bits 2 to 0 are initialized to 0 by a
reset. In software standby mode bits 2 to 0 are not initialized, but retain their previous values.
Bit 7—Overflow Flag (OVF): This status flag indicates that the timer counter has overflowed
from H'FF to H'00.
Rev.4.00 Aug. 20, 2007 Page 312 of 638
REJ09B0395-0400
Bit 7
OVF
0
1
Bit
Initial value
Read/Write
inadvertent overwriting. For details see section 11.2.4, Notes on Register Access.
* Only 0 can be written, to clear the flag.
Timer Control/Status Register (TCSR)
Description
[Clearing condition]
Cleared by reading OVF when OVF = 1, then writing 0 in OVF
[Setting condition]
Set when TCNT changes from H'FF to H'00
R/(W)
Overflow flag
Status flag indicating overflow
OVF
7
0
*
WT/IT
Timer mode select
Selects the mode
R/W
6
0
Timer enable
TME
Selects whether TCNT runs or halts
R/W
5
0
⎯
⎯
4
1
Reserved bits
⎯
⎯
3
1
CKS2
R/W
2
0
Clock select
These bits select the
TCNT clock source
CKS1
R/W
1
0
(Initial value)
CKS0
R/W
0
0